This patch adds a driver for the bus associated with a IHS FPGA.
Signed-off-by: Mario Six <mario....@gdsys.cc>
---
v1 -> v2:
* Switched to correct uclass for IHS FPGA driver (now in MISC uclass)
---
drivers/misc/Kconfig | 6 ++++-
drivers/misc/Makefile | 1 +
drivers/misc/gdsys_soc.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++
drivers/misc/gdsys_soc.h | 24 +++++++++++++++++
4 files changed, 97 insertions(+), 1 deletion(-)
create mode 100644 drivers/misc/gdsys_soc.c
create mode 100644 drivers/misc/gdsys_soc.h
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d774569cbc..9d58d96321 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -263,5 +263,9 @@ config SYS_I2C_EEPROM_ADDR_OVERFLOW
endif
-
+config GDSYS_SOC
+ bool "Enable gdsys SOC driver"
+ depends on MISC
+ help
+ Support for IHS SOC.
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index e8d598cd47..d35f7d856d 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,3 +54,4 @@ obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
+obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
new file mode 100644
index 0000000000..0bf1dd8303
--- /dev/null
+++ b/drivers/misc/gdsys_soc.c
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario....@gdsys.cc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+
+#include "gdsys_soc.h"
+
+struct gdsys_soc_priv {
+ struct udevice *fpga;
+};
+
+static const struct udevice_id gdsys_soc_ids[] = {
+ { .compatible = "gdsys,soc" },
+ { /* sentinel */ }
+};
+
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga)
+{
+ struct gdsys_soc_priv *bus_priv;
+
+ if (!child->parent)
+ return -EINVAL;
+
+ if (!device_is_compatible(child->parent, "gdsys,soc"))
+ return -EINVAL;
+
+ bus_priv = dev_get_priv(child->parent);
+
+ *fpga = bus_priv->fpga;
+
+ return 0;
+}
+
+static int gdsys_soc_probe(struct udevice *dev)
+{
+ struct gdsys_soc_priv *priv = dev_get_priv(dev);
+ struct udevice *fpga;
+ int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
+ &fpga);
+ if (res == -ENOENT) {
+ printf("%s: Could not find 'fpga' phandle.\n", dev->name);
+ return -EINVAL;
+ }
+
+ if (res == -ENODEV) {
+ printf("%s: Could not get FPGA device.\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv->fpga = fpga;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(gdsys_soc_bus) = {
+ .name = "gdsys_soc_bus",
+ .id = UCLASS_SIMPLE_BUS,
+ .of_match = gdsys_soc_ids,
+ .probe = gdsys_soc_probe,
+ .priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
+};
diff --git a/drivers/misc/gdsys_soc.h b/drivers/misc/gdsys_soc.h
new file mode 100644
index 0000000000..0f88149fd6
--- /dev/null
+++ b/drivers/misc/gdsys_soc.h
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario....@gdsys.cc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _GDSYS_SOC_H_
+#define _GDSYS_SOC_H_
+
+/**
+ * gdsys_soc_get_fpga() - Retrieve pointer to parent bus' FPGA device
+ *
+ * To access their register maps, devices on gdsys soc buses usually have
+ * facilitate the accessor function of the IHS FPGA their parent bus is
+ * attached to. To access the FPGA device from within the bus' children, this
+ * function returns a pointer to it.
+ *
+ * @child: The child device on the FPGA bus needing access to the FPGA.
+ * @fpga: Pointer to the retrieved FPGA device.
+ * @return 0 on success, -ve on failure
+ */
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga);
+#endif /* _GDSYS_SOC_H_ */
--
2.16.1
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