Hi Chris. Thanks for your response. There was a typo earlier, the correct U-boot version is 1.1.4. The current RAM consists of two physical chips of 64 MB each, it is the Winbond W9751G6JB (DDR2). 1T/2T is not supported as I understand. I'll examine the board layout to see how it is affecting the DDR.
On Sun, Jun 3, 2018 at 9:46 PM, Chris Packham <judge.pack...@gmail.com> wrote: > > > On Fri, 1 Jun 2018, 10:42 PM Greg Maitz, <ghh19...@gmail.com> wrote: >> >> Hi - I have a target Atheros 9344 board on which I have loaded U-boot >> version 1.23.2. On the reference board, the DRAM clock frequency has >> been set to 400 MHz and it works well. > > > Sounds like you've got a vendor bootloader. 1.23.2 isn't a version number > used by u-boot. You might get more informed support from wherever you > obtained this. > >> But when the same clock >> frequency is used on my target board , mtest (memory test) fails. >> However, when I reduced the clock frequency to 300 MHz, the mtest >> passes and it appears to be stable. >> The reference and target boards are alike in almost every respect. > > > Double check this assertion. Even if things appear similar on a schematic > the board layout is significant when it comes to ddr. > >> The >> DRAM specifications are the same but the manufacturer is different. >> >> I tried setting the DRAM timing parameters on my target DRAM to be >> aligned with the numbers in the data sheet. When I load the Linux >> kernel after this, there are a variety of kernel panics seen if I >> leave it on overnight. They are OOPS messages such as "Unable to >> handle kernel paging request at virtual address", I think they may be >> related to the DRAM clock frequency setting. > > > A plug here for memtester http://pyropus.ca/software/memtester/ it's been > quite handy for excercising ram. Unfortunately it won't fix the problem, but > it will let you know when you have. > >> I'd like to eventually use 400 MHz clock for the DRAM clock frequency >> on my target board. If anyone has faced a similar scenario earlier, >> kindly share your tips to debug the problem. > > > I've used enabled 2T timing (assuming your ddr controller supports it) for > similar issues in the past. If it works it's usually an indication of some > hardware issue but it may get you through to the next board spin. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot