On 03.06.2018 06:21, Chris Packham wrote:
The SBx81LIFKW boards connect to the internal chassis management network
via a Marvell 88e6097 L2 switch. The chassis connections are direct
serdes on ports 8 and 9 with a RGMII interface on port 10 connected to
the CPU MAC.
For debugging purposes ports 0 and 1 are also taken out to headers on
the board. Because the debug interfaces are sometimes connected to with
straight ribbon cables we need to run them at 10Mbps.
Signed-off-by: Chris Packham <judge.pack...@gmail.com>
---
board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c | 14 ++++++++++++--
configs/SBx81LIFKW_defconfig | 6 ++++++
include/configs/SBx81LIFKW.h | 5 -----
3 files changed, 18 insertions(+), 7 deletions(-)
Reviewed-by: Stefan Roese <s...@denx.de>
Thanks,
Stefan
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