Add SDHI nodes to R8A77990 E3 SoC to allow SDHI operation.
Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
---
arch/arm/dts/r8a77990.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 4f77be2a60..6d2d5e1068 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -185,6 +185,30 @@
reg = <0 0xe6160000 0 0x0200>;
};
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee100000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee120000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a77990";
+ reg = <0 0xee160000 0 0x2000>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a77990-sysc";
reg = <0 0xe6180000 0 0x0400>;
--
2.17.1
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