On 06/20/2018 09:06 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee <tien.fong.c...@intel.com>
>
> In ARM 64-bits, memory size can be supported is more than 4GB,
> hence increasing save array is needed to cope with testing larger memory.
>
> Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
> ---
>
> Changes in v2:
> - Change save array size to save[BITS_PER_LONG - 1]
> ---
> common/memsize.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/common/memsize.c b/common/memsize.c
> index 5670e95..13b0047 100644
> --- a/common/memsize.c
> +++ b/common/memsize.c
> @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
> long get_ram_size(long *base, long maxsize)
> {
> volatile long *addr;
> - long save[31];
> + long save[BITS_PER_LONG - 1];
> long save_base;
> long cnt;
> long val;
>
Does this work with LPAE systems, where bits per long == 32 and the
address space is bigger ? Or with similar setups ? I mean, you can have
> 4 GiB of RAM on 32bit system ...
--
Best regards,
Marek Vasut
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