Hi York, > -----Original Message----- > From: York Sun > Sent: Wednesday, July 11, 2018 05:06 > To: Ran Wang <ran.wan...@nxp.com>; Albert Aribaud > <albert.u.b...@aribaud.net> > Cc: u-boot@lists.denx.de > Subject: Re: [PATCH] armv8: layerscape: Enable EHCI access for LS1012A > > On 07/02/2018 10:34 PM, Ran Wang wrote: > > Program Central Security Unit (CSU) to grant access permission for USB > > 2.0 controller, otherwiase EHCI funciton will down. > > > > Signed-off-by: Ran Wang <ran.wan...@nxp.com> > > --- > > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 8 ++++++++ > > arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 + > > 2 files changed, 9 insertions(+) > > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c > > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c > > index 6a56269..2c4cf7f 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c > > @@ -14,6 +14,7 @@ > > #include <asm/io.h> > > #include <asm/global_data.h> > > #include <asm/arch-fsl-layerscape/config.h> > > +#include <asm/arch-fsl-layerscape/ns_access.h> > > #ifdef CONFIG_LAYERSCAPE_NS_ACCESS > > #include <fsl_csu.h> > > #endif > > @@ -668,6 +669,13 @@ void fsl_lsch2_early_init_f(void) > > CCI400_DVM_MESSAGE_REQ_EN | > CCI400_SNOOP_REQ_EN); > > } > > > > + /* > > + * Program Central Security Unit (CSU) to grant access > > + * permission for USB 2.0 controller > > + */ > > +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL) > > + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); #endif > > Is this LS1012A specific? > For Layerscape platforms, only LS1012A and LS1021A have USB2.0(EHCI) controller, Others have USB3.0 controller only. For now I can only verify on LS1012A, so didn't cover LS1021A yet.
Ran > York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot