On 07/18/2018 03:46 AM, Janine Hagemann wrote:
- Remove 0004-Net-phy-ti-Fix-fifo_depth-register-write.patch because of the change from 0005-net-phy-ti-Recover-from-port-mirroring- N-A-MODE4.patch it isn't needed anymore. Before, the MII_DP83867_ PHYCTRL-register wasn't write correctly without the fix-patch.
I can't find v1 of this series, so above comment looks strange. What's wrong exactly with "PHYCTRL-register wasn't write correctly"?
- correct commit reference format Janine Hagemann (11): arch: arm: mach-rockchip: rk3288: Enable regulators in board_init config: phycore-rk3288_defconfig: add PHY_TI net: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver net: phy: ti: Recover from "port mirroring" N/A MODE4 net: phy: ti: add workaround for incorrect RX_CTRL pin strap net: gmac_rockchip: Add handeling for RGMII_ID/RXID/TXID drivers: net: designware: Add reading of DT phy-handle node net: phy: ti: Add binding for the CLK_OUT pin muxing ARM: dts: rockchip: ADD dp83867 CLK_OUT muxing rockchip: rk3288-phycore: set flash1 iodomain to 1.8V arch/arm/dts/rk3288-phycore-som.dtsi | 1 + arch/arm/mach-rockchip/rk3288-board.c | 6 ++ board/phytec/phycore_rk3288/phycore-rk3288.c | 16 +++++ configs/phycore-rk3288_defconfig | 1 + doc/device-tree-bindings/net/ti,dp83867.txt | 3 + drivers/net/designware.c | 11 ++- drivers/net/designware.h | 1 + drivers/net/gmac_rockchip.c | 80 ++++++++++++++++----- drivers/net/phy/ti.c | 104 ++++++++++++++++++++++++++- include/dt-bindings/net/ti-dp83867.h | 15 ++++ 10 files changed, 219 insertions(+), 19 deletions(-)
-- regards, -grygorii _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
