On 08/22/2018 06:15 PM, ying.zhang22...@nxp.com wrote:
> From: Zhang Ying-22455 <ying.zhang22...@nxp.com>
>
> * Add mpc8xxx_gpio_plat for for Layerscape SoC
> * Make the mpc8xxx driver capable of handling Layerscape Soc.
>
> Signed-off-by: Zhang Ying-22455 <ying.zhang22...@nxp.com>
> ---
> arch/arm/include/asm/arch-fsl-layerscape/gpio.h | 24
> ++++++++++++++++++++++
> .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
> arch/arm/include/asm/arch-ls102xa/gpio.h | 6 ++++++
> drivers/gpio/mpc8xxx_gpio.c | 1 +
> 4 files changed, 33 insertions(+)
> create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/gpio.h
>
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
> b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
> new file mode 100644
> index 0000000..b6afcaa
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h
> @@ -0,0 +1,24 @@
> +/*
> + * Copyright 2008-2016 Freescale Semiconductor, Inc.
> + * Copyright 2017-2018 NXP Semiconductor
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
> +
> +#ifndef _ASM_ARCH_LAYERSCAPE_GPIO_H_
> +#define _ASM_ARCH_LAYERSCAPE_GPIO_H_
> +
> +#ifdef CONFIG_FSL_LSCH2
> +#include <asm/arch/immap_lsch2.h>
> +#endif
> +#ifdef CONFIG_FSL_LSCH3
> +#include <asm/arch/immap_lsch3.h>
> +#endif
> +
> +struct mpc8xxx_gpio_plat {
> + ulong addr;
> + unsigned long size;
> + uint ngpios;
> +};
> +
> +#endif
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> index be0a6ae..18f6875 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> @@ -650,6 +650,7 @@ struct ccsr_serdes {
> u8 res_19a0[0x2000-0x19a0]; /* from 0x19a0 to 0x1fff */
> };
>
> +#ifndef CONFIG_MPC8XXX_GPIO
> struct ccsr_gpio {
> u32 gpdir;
> u32 gpodr;
> @@ -659,6 +660,7 @@ struct ccsr_gpio {
> u32 gpicr;
> u32 gpibe;
> };
> +#endif
Why do you need to keep this code?
York
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