In order to be able to build the Rockchip eMMC driver
on rv1108, the CONFIG_BOUNCE_BUFFER option needs to be
selected.
Select it like it is done on the other Rockchip SoC common files.
This also adds the pinctrl handles to enable the use of eMMC on custom
boards (as minievk) and makes it easier for later addition.
Signed-off-by: Otavio Salvador <ota...@ossystems.com.br>
---
Changes in v2: None
arch/arm/dts/rv1108.dtsi | 29 +++++++++++++++++++++++++++++
include/configs/rv1108_common.h | 3 +++
2 files changed, 32 insertions(+)
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index acfd97e18d..23a44bfaca 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -427,6 +427,35 @@
};
};
+ emmc {
+ emmc_clk: emmc-clk {
+ rockchip,pins = <2 RK_PB6 RK_FUNC_1
&pcfg_pull_none_drv_8ma>;
+ };
+
+ emmc_cmd: emmc-cmd {
+ rockchip,pins = <2 RK_PB4 RK_FUNC_2
&pcfg_pull_up_drv_8ma>;
+ };
+
+ emmc_pwren: emmc-pwren {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_2
&pcfg_pull_none>;
+ };
+
+ emmc_bus1: emmc-bus1 {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_2
&pcfg_pull_up_drv_8ma>;
+ };
+
+ emmc_bus8: emmc-bus8 {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA1 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA2 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA3 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA4 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA5 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA6 RK_FUNC_2
&pcfg_pull_up_drv_8ma>,
+ <2 RK_PA7 RK_FUNC_2
&pcfg_pull_up_drv_8ma>;
+ };
+ };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <3 RK_PC4 RK_FUNC_1
&pcfg_pull_none_drv_4ma>;
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 2ab3b85e0c..cc0384e2f4 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -17,6 +17,9 @@
#define CONFIG_SYS_TIMER_BASE 0x10350020
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE +
0x100000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
--
2.19.1
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