Signed-off-by: David Wu <davi...@arcturusnetworks.com>
---
board/Mercury/ep2500/Makefile | 44 ++++++
board/Mercury/ep2500/config.mk | 23 +++
board/Mercury/ep2500/ep2500.c | 191 +++++++++++++++++++++++++
board/Mercury/ep2500/u-boot.lds | 140 ++++++++++++++++++
include/configs/EP2500.h | 297
+++++++++++++++++++++++++++++++++++++++
5 files changed, 695 insertions(+), 0 deletions(-)
create mode 100644 board/Mercury/ep2500/Makefile
create mode 100644 board/Mercury/ep2500/config.mk
create mode 100644 board/Mercury/ep2500/ep2500.c
create mode 100644 board/Mercury/ep2500/u-boot.lds
create mode 100644 include/configs/EP2500.h
diff --git a/board/Mercury/ep2500/Makefile b/board/Mercury/ep2500/Makefile
new file mode 100644
index 0000000..424ab1c
--- /dev/null
+++ b/board/Mercury/ep2500/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Mercury/ep2500/config.mk
b/board/Mercury/ep2500/config.mk
new file mode 100644
index 0000000..5639dbb
--- /dev/null
+++ b/board/Mercury/ep2500/config.mk
@@ -0,0 +1,23 @@
+#
+# (c) Copyright 2009 Arcturus Networks Inc.
+# by David Wu <www.ArcturusNetworks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+TEXT_BASE = 0xFF000000
diff --git a/board/Mercury/ep2500/ep2500.c b/board/Mercury/ep2500/ep2500.c
new file mode 100644
index 0000000..03be4cf
--- /dev/null
+++ b/board/Mercury/ep2500/ep2500.c
@@ -0,0 +1,191 @@
+/*
+ * (c) Copyright 2009 Arcturus Networks Inc.
+ * by David Wu <www.ArcturusNetworks.com>
+ *
+ * Based in part on: board/freescale/m5282evb/m5282evb.c
+ * (c) Copyright 2000-2003 Wolfgang Denk,
+ * DENX Software Engineering, w...@denx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <net.h>
+#include <i2c.h>
+#include <asm/io.h>
+#include <asm/fsl_i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: Mercury EP2500 Board\n");
+ return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+ u32 dramsize, i, j, dramclk;
+
+ dramclk = gd->bus_clk / (CONFIG_SYS_HZ * CONFIG_SYS_HZ);
+
+ if (!(MCFSDRAMC_DACR0 & MCFSDRAMC_DACR_RE)) {
+ /* Initialize DRAM Control Register: DCR */
+ MCFSDRAMC_DCR = (0
+ | MCFSDRAMC_DCR_RTIM_6
+ | MCFSDRAMC_DCR_RC((15 * dramclk) >> 4));
+ asm("nop");
+
+ /* for 2 DRAMs */
+ for (j = 0; j < 2; j++) {
+ int base;
+ if (j == 0) {
+ base = CONFIG_SYS_SDRAM0_BASE;
+ dramsize = CONFIG_SYS_SDRAM0_SIZE * 0x100000;
+ } else {
+ base = CONFIG_SYS_SDRAM1_BASE;
+ dramsize = CONFIG_SYS_SDRAM1_SIZE * 0x100000;
+ }
+ /* Initialize DACR0 */
+ MCFSDRAMC_DACR_F(j) = (0 | MCFSDRAMC_DACR_BASE(base)
+ | MCFSDRAMC_DACR_CASL(1)
+ | MCFSDRAMC_DACR_CBM(3)
+ | MCFSDRAMC_DACR_PS_16);
+ asm("nop");
+
+ /* Initialize DMR0 */
+ MCFSDRAMC_DMR_F(j) = (0 | ((dramsize - 1) & 0xFFFC0000)
+ | MCFSDRAMC_DMR_V);
+ asm("nop");
+
+ /* Set IP (bit 3) in DACR */
+ MCFSDRAMC_DACR_F(j) |= MCFSDRAMC_DACR_IP;
+ asm("nop");
+
+ /* Wait 30ns for precharge (nop ~ 6ns) */
+ asm("nop");
+ asm("nop");
+ asm("nop");
+ asm("nop");
+ asm("nop");
+
+ /* Write to this block to initiate precharge */
+ if (j == 0)
+ *(vu_short *) (base) = 0x0000;
+ else
+ *(vu_short *) (base) = 0xbabe;
+ asm("nop");
+
+ /* Set RE (bit 15) in DACR */
+ MCFSDRAMC_DACR_F(j) |= MCFSDRAMC_DACR_RE;
+ asm("nop");
+
+ /* Wait for at least 8 auto refresh cycles to occur */
+ for (i = 0; i < 2000; i++)
+ asm(" nop");
+
+ /* Finish the configuration by issuing the IMRS. */
+ MCFSDRAMC_DACR_F(j) |= MCFSDRAMC_DACR_IMRS;
+ asm("nop");
+
+ /* Write to the SDRAM Mode Register */
+ if (j == 0)
+ *(vu_short *) (base + 0x800) = 0x0000;
+ else
+ *(vu_short *) (base + 0x800) = 0xbabe;
+ }
+ MCFSDRAMC_DACR_F(1) &= ~MCFSDRAMC_DACR_IMRS;
+ }
+ return CONFIG_SYS_SDRAM_SIZE * 0x100000;
+}
+
+/*************************************************************************
+ * board_get_enetaddr
+ *
+ * Get the ethernet MAC address from the EEPROM.
+ *
+ ************************************************************************/
+
+void board_get_enetaddr(uchar *enet)
+{
+ int i;
+ unsigned char buff[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+ /* Read MAC address (6 bytes) in EEPROM */
+ if (i2c_read
+ (CONFIG_SYS_I2C_EEPROM_ADDR, MAC_ADDRESS_OFFSET_IN_EEPROM,
+ CONFIG_SYS_I2C_EEPROM_ADDR_LEN, buff, 6) != 0) {
+ puts("Error reading the EEPROM.\n");
+ }
+
+ /*
+ * When buff returns all 0xFF the EEPROM has not
+ * been programed with a valid MAC. In this case
+ * we set enet to all 0x00 as 0xFF is not valid
+ * for this usage model.
+ */
+ if (buff[0] == 0xff && buff[1] == 0xff && buff[2] == 0xff &&
+ buff[3] == 0xff && buff[4] == 0xff && buff[5] == 0xff) {
+ for (i = 0; i < 6; i++)
+ enet[i] = 0;
+ } else {
+ for (i = 0; i < 6; i++)
+ enet[i] = buff[i];
+ }
+
+ return;
+}
+
+int misc_init_r(void)
+{
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+ uchar enetaddr[6];
+
+ if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ board_get_enetaddr(enetaddr);
+ eth_setenv_enetaddr("ethaddr", enetaddr);
+ }
+#endif
+ return 0;
+}
+
+/**
+ * i2c_init_board - set i2c bus to be idle.
+ * According to Freescale Coldfire user manual such as MCF5282UM,
+ * if I2SR[IBB] is set when the I2C bus module is enabled,
+ * before proceeding with normal initialization code. This routine
+ * is required. It issues a STOP command to the slave device,
+ * placing it in idle state as if it were just powercycled on.
+ */
+void i2c_init_board(void)
+{
+ struct fsl_i2c *dev;
+
+ dev = (struct fsl_i2c *)(CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
+
+ if (readb(&dev->sr) & I2C_SR_MBB) {
+ writeb(0, &dev->cr);
+ writeb(0xa0, &dev->cr);
+ readb(&dev->dr);
+ writeb(0x0, &dev->sr);
+ writeb(0, &dev->cr);
+ writeb(I2C_CR_MEN, &dev->cr);
+ }
+}
diff --git a/board/Mercury/ep2500/u-boot.lds
b/board/Mercury/ep2500/u-boot.lds
new file mode 100644
index 0000000..f46e025
--- /dev/null
+++ b/board/Mercury/ep2500/u-boot.lds
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf52x2/start.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/string.o (.text)
+ lib_generic/vsprintf.o (.text)
+ lib_generic/crc32.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/env_embedded.o(.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/include/configs/EP2500.h b/include/configs/EP2500.h
new file mode 100644
index 0000000..574e51e
--- /dev/null
+++ b/include/configs/EP2500.h
@@ -0,0 +1,297 @@
+/*
+ * Configuation settings for Mercury's EP2500 board.
+ *
+ * (c) Copyright 2009-2010 Arcturus Networks Inc.
+ * by David Wu <www.ArcturusNetworks.com>
+ *
+ * Based in part on: include/configs/m5282evb.h
+ * (c) Copyright 2000-2003 Wolfgang Denk,
+ * DENX Software Engineering, w...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _CONFIG_EP2500_H
+#define _CONFIG_EP2500_H
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5282 /* define processor type */
+#define CONFIG_EP2500 /* define board */
+
+#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT (0)
+#define CONFIG_BAUDRATE 38400
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define CONFIG_SYS_ENABLE_ICACHE /* enable icache */
+/* define if monitor is started from a pre-loader */
+#undef CONFIG_MONITOR_IS_IN_RAM
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#define CONFIG_ENV_ADDR 0xff040000
+#define CONFIG_ENV_SIZE 0x40000
+#define CONFIG_ENV_IS_IN_FLASH 1
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+/*#define CONFIG_CMD_MII*/
+#define CONFIG_CMD_I2C
+/*#define CONFIG_CMD_JFFS2*/
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+/*#define FEC_ENET 1 */
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CONFIG_MII_INIT 1
+# define CONFIG_SYS_DISCOVER_PHY
+# define CONFIG_SYS_RX_ETH_BUFFER 8
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+
+# define CONFIG_SYS_FEC0_PINMUX 0
+# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+# ifndef CONFIG_SYS_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CONFIG_SYS_DISCOVER_PHY */
+#endif
+
+#define CONFIG_BOOTDELAY 5
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:00:00:00:00:00
+# define CONFIG_IPADDR 192.168.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.168.1.1
+# define CONFIG_GATEWAYIP 192.168.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*#define CONFIG_ENV_OVERWRITE */
+#endif /* CONFIG_MCFFEC */
+
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#undef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C_SPEED 80000
+#define CONFIG_SYS_I2C_SLAVE 0x35 /* slave mode: slave address, not used
*/
+#define CONFIG_SYS_I2C_OFFSET 0x00000300
+#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
+/*#define CONFIG_CMD_EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define MAC_ADDRESS_OFFSET_IN_EEPROM 118
+
+#define CONFIG_HOSTNAME EP2500
+#define PRODUCT_REVISION "EP2500"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "REVISION="PRODUCT_REVISION"\0" \
+ "netdev=eth0\0" \
+ "loadaddr=10010000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ff000000 ff03ffff;" \
+ "era ff000000 ff03ffff;" \
+ "cp.b ${loadaddr} ff000000 ${filesize};"\
+ "setenv filesize;save\0" \
+ ""
+
+#define CONFIG_SYS_PROMPT "-> "
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer
Size */
+#else
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer
Size */
+#endif
+#define CONFIG_SYS_PBSIZE
(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+ /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /*Boot Argument Buffer Size
*/
+
+#define CONFIG_SYS_LOAD_ADDR 0x20000
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END
(CONFIG_SYS_MEMTEST_START+CONFIG_SYS_SDRAM0_SIZE)
+ /* first SDRAM */
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_CLK 58982400 /* 58.98 MHz; 7.3728
MHz * 8 */
+
+/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
+
+#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
+#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CONFIG_SYS_MBAR 0x40000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in
internal
SRAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 64 /*size in bytes reserved for initial
data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE 0x10000000
+#define CONFIG_SYS_SDRAM_SIZE 32
+#define CONFIG_SYS_SDRAM0_BASE 0x10000000
+#define CONFIG_SYS_SDRAM0_SIZE 16
+#define CONFIG_SYS_SDRAM1_BASE 0x11000000
+#define CONFIG_SYS_SDRAM1_SIZE 16
+
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
+#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
+#define CONFIG_SYS_INT_FLASH_SIZE 0x80000
+#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
+
+/* If M5282 port is fully implemented the monitor base will be behind
+ * the vector table. */
+#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
+#else
+#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for
CFM-Config */
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN 0x20000
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CONFIG_SYS_BOOTMAPSZ
(CONFIG_SYS_SDRAM_BASE+(CONFIG_SYS_SDRAM_SIZE<<20))
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_SIZE 0x1000000
+ /* Max size that the board might have */
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one
chip */
+#define CONFIG_SYS_FLASH_PROTECTION /* "Real"(hardware) sectors
protection */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_END
- 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_END
- 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1 0
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD) /*
0x80400000 */
+#define CONFIG_SYS_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+#define CONFIG_SYS_CS0_BASE 0xFF000000
+#define CONFIG_SYS_CS0_CTRL 0x00001da0
+#define CONFIG_SYS_CS0_MASK 0x00FF0001
+#define CONFIG_SYS_CS2_BASE 0x30000000
+#define CONFIG_SYS_CS2_CTRL 0x000015a0
+#define CONFIG_SYS_CS2_MASK 0x000f0041
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
+#define CONFIG_SYS_PADDR 0x0000000
+#define CONFIG_SYS_PADAT 0x0000000
+
+#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
+#define CONFIG_SYS_PBDDR 0x0000000
+#define CONFIG_SYS_PBDAT 0x0000000
+
+#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
+#define CONFIG_SYS_PCDDR 0x0000000
+#define CONFIG_SYS_PCDAT 0x0000000
+
+#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
+#define CONFIG_SYS_PCDDR 0x0000000
+#define CONFIG_SYS_PCDAT 0x0000000
+
+#define CONFIG_SYS_PASPAR 0x000F
+#define CONFIG_SYS_PEHLPAR 0xC0
+#define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
+#define CONFIG_SYS_DDRUA 0x05
+#define CONFIG_SYS_PJPAR 0xF5
+
+#define CONFIG_SYS_PEHLPAR 0xC0
+#define CONFIG_SYS_DDRD 0xFF /* Port D : all output
*/
+#define CONFIG_SYS_PFPAR 0xE0
+
+#define CONFIG_SYS_PTCPAR 0x0 /* Port TC used for UART0 */
+#define CONFIG_SYS_PORTTC 0x0 /* driver 0 */
+#define CONFIG_SYS_DDRTC 0xf /* output */
+
+#define MCFSDRAMC_DACR_F(i) (*(vu_long
*)(CONFIG_SYS_MBAR+0x00000048+(i*0x8)))
+#define MCFSDRAMC_DMR_F(i) (*(vu_long
*)(CONFIG_SYS_MBAR+0x0000004c+(i*0x8)))
+
+#endif /* _CONFIG_EP2500_H */
--
1.5.6
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