Add Cortex A9 support by copying the code for Cortex A8. The only
change is a removal of some OMAP3 specific code.
Acked-by: Michael Brandt <michael.bra...@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vinc...@stericsson.com>
---
cpu/{arm_cortexa8 => arm_cortexa9}/Makefile | 0
cpu/{arm_cortexa8 => arm_cortexa9}/config.mk | 0
cpu/{arm_cortexa8 => arm_cortexa9}/cpu.c | 0
cpu/{arm_cortexa8 => arm_cortexa9}/start.S | 26 +------------------------
cpu/{arm_cortexa8 => arm_cortexa9}/u-boot.lds | 2 +-
5 files changed, 2 insertions(+), 26 deletions(-)
copy cpu/{arm_cortexa8 => arm_cortexa9}/Makefile (100%)
copy cpu/{arm_cortexa8 => arm_cortexa9}/config.mk (100%)
copy cpu/{arm_cortexa8 => arm_cortexa9}/cpu.c (100%)
copy cpu/{arm_cortexa8 => arm_cortexa9}/start.S (91%)
copy cpu/{arm_cortexa8 => arm_cortexa9}/u-boot.lds (97%)
diff --git a/cpu/arm_cortexa8/Makefile b/cpu/arm_cortexa9/Makefile
similarity index 100%
copy from cpu/arm_cortexa8/Makefile
copy to cpu/arm_cortexa9/Makefile
diff --git a/cpu/arm_cortexa8/config.mk b/cpu/arm_cortexa9/config.mk
similarity index 100%
copy from cpu/arm_cortexa8/config.mk
copy to cpu/arm_cortexa9/config.mk
diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa9/cpu.c
similarity index 100%
copy from cpu/arm_cortexa8/cpu.c
copy to cpu/arm_cortexa9/cpu.c
diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa9/start.S
similarity index 91%
copy from cpu/arm_cortexa8/start.S
copy to cpu/arm_cortexa9/start.S
index 29dae2f..d667f6e 100644
--- a/cpu/arm_cortexa8/start.S
+++ b/cpu/arm_cortexa9/start.S
@@ -1,5 +1,5 @@
/*
- * armboot - Startup Code for OMAP3530/ARM Cortex CPU-core
+ * armboot - Startup Code for ARM Cortex-A9 CPU-core
*
* Copyright (c) 2004 Texas Instruments <r-woodru...@ti.com>
*
@@ -108,30 +108,6 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
-#if (CONFIG_OMAP34XX)
- /* Copy vectors to mask ROM indirect addr */
- adr r0, _start @ r0 <- current position of code
- add r0, r0, #4 @ skip reset vector
- mov r2, #64 @ r2 <- size to copy
- add r2, r0, r2 @ r2 <- source end address
- mov r1, #SRAM_OFFSET0 @ build vect addr
- mov r3, #SRAM_OFFSET1
- add r1, r1, r3
- mov r3, #SRAM_OFFSET2
- add r1, r1, r3
-next:
- ldmia r0!, {r3 - r10} @ copy from source address [r0]
- stmia r1!, {r3 - r10} @ copy to target address [r1]
- cmp r0, r2 @ until source end address [r2]
- bne next @ loop until equal */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
- /* No need to copy/exec the clock code - DPLL adjust already done
- * in NAND/oneNAND Boot.
- */
- bl cpy_clk_code @ put dpll adjust code behind vectors
-#endif /* NAND Boot */
-#endif
- /* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
diff --git a/cpu/arm_cortexa8/u-boot.lds b/cpu/arm_cortexa9/u-boot.lds
similarity index 97%
copy from cpu/arm_cortexa8/u-boot.lds
copy to cpu/arm_cortexa9/u-boot.lds
index 4f1711c..fc787cd 100644
--- a/cpu/arm_cortexa8/u-boot.lds
+++ b/cpu/arm_cortexa9/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
. = ALIGN(4);
.text :
{
- cpu/arm_cortexa8/start.o (.text)
+ cpu/arm_cortexa9/start.o (.text)
*(.text)
}
--
1.7.0
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