This allows the driver to be used without OF_CONTROL.
AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in
SPL thus requires that the omap I2C can be passed platdata.
Signed-off-by: Jean-Jacques Hiblot <jjhib...@ti.com>
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/arch-am33xx/i2c.h | 2 ++
arch/arm/include/asm/omap_i2c.h | 24 ++++++++++++++++++++++++
drivers/i2c/omap24xx_i2c.c | 21 +++++++++++----------
3 files changed, 37 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/include/asm/omap_i2c.h
diff --git a/arch/arm/include/asm/arch-am33xx/i2c.h
b/arch/arm/include/asm/arch-am33xx/i2c.h
index b3cc3df..c2a9850 100644
--- a/arch/arm/include/asm/arch-am33xx/i2c.h
+++ b/arch/arm/include/asm/arch-am33xx/i2c.h
@@ -6,6 +6,8 @@
#ifndef _I2C_AM33XX_H_
#define _I2C_AM33XX_H_
+#include <asm/omap_i2c.h>
+
#define I2C_BASE1 0x44E0B000
#define I2C_BASE2 0x4802A000
#define I2C_BASE3 0x4819C000
diff --git a/arch/arm/include/asm/omap_i2c.h b/arch/arm/include/asm/omap_i2c.h
new file mode 100644
index 0000000..c1695cb
--- /dev/null
+++ b/arch/arm/include/asm/omap_i2c.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _OMAP_I2C_H
+#define _OMAP_I2C_H
+
+#include <asm/arch/cpu.h>
+
+#ifdef CONFIG_DM_I2C
+
+/* Information about a GPIO bank */
+struct omap_i2c_platdata {
+ ulong base; /* address of registers in physical memory */
+ int speed;
+ int ip_rev;
+};
+
+#endif
+
+enum {
+ OMAP_I2C_REV_V1 = 0,
+ OMAP_I2C_REV_V2 = 1,
+};
+
+#endif /* _OMAP_I2C_H */
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 9f71639..4b93e02 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -43,6 +43,7 @@
#include <i2c.h>
#include <asm/io.h>
+#include <asm/omap_i2c.h>
/*
* Provide access to architecture-specific I2C header files for platforms
@@ -62,11 +63,6 @@
#define I2C_WAIT 200
enum {
- OMAP_I2C_REV_V1 = 0,
- OMAP_I2C_REV_V2 = 1,
-};
-
-enum {
OMAP_I2C_REV_REG = 0, /* Only on IP V1 (OMAP34XX) */
OMAP_I2C_IE_REG, /* Only on IP V1 (OMAP34XX) */
OMAP_I2C_STAT_REG,
@@ -1051,8 +1047,12 @@ static int omap_i2c_probe_chip(struct udevice *bus, uint
chip_addr,
static int omap_i2c_probe(struct udevice *bus)
{
struct omap_i2c *priv = dev_get_priv(bus);
+ struct omap_i2c_platdata *plat = dev_get_platdata(bus);
- priv->ip_rev = dev_get_driver_data(bus);
+ priv->speed = plat->speed;
+ priv->regs = map_physmem(plat->base, sizeof(void *),
+ MAP_NOCACHE);
+ priv->ip_rev = plat->ip_rev;
__omap24_i2c_init(priv->regs, priv->ip_rev, priv->speed, 0,
&priv->waitdelay);
@@ -1063,11 +1063,11 @@ static int omap_i2c_probe(struct udevice *bus)
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
{
- struct omap_i2c *priv = dev_get_priv(bus);
+ struct omap_i2c_platdata *plat = dev_get_platdata(bus);
- priv->regs = map_physmem(devfdt_get_addr(bus), sizeof(void *),
- MAP_NOCACHE);
- priv->speed = CONFIG_SYS_OMAP24_I2C_SPEED;
+ plat->base = devfdt_get_addr(bus);
+ plat->speed = dev_read_u32_default(bus, "clock-frequency", 100000);
+ plat->ip_rev = dev_get_driver_data(bus);
return 0;
}
@@ -1091,6 +1091,7 @@ U_BOOT_DRIVER(i2c_omap) = {
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.of_match = omap_i2c_ids,
.ofdata_to_platdata = omap_i2c_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct omap_i2c_platdata),
#endif
.probe = omap_i2c_probe,
.priv_auto_alloc_size = sizeof(struct omap_i2c),
--
2.7.4
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