Hmm good question. I went with flush because that's what's done in the transmit function:
addr = (ulong) ptr; addr &= ~(ARCH_DMA_MINALIGN - 1); size = roundup(len, ARCH_DMA_MINALIGN); flush_dcache_range(addr, addr + size); addr = (ulong)priv->rxbuffers; addr &= ~(ARCH_DMA_MINALIGN - 1); size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN); flush_dcache_range(addr, addr + size); barrier(); But since we actually want the uncached data invalidation seems logical. I have to admit though, I don't have much experience with caches. This patch completely fixed my problem... Maybe somebody with a bit more expertise can add their opinion? Regards, Stefan > -----Ursprüngliche Nachricht----- > Von: Bin Meng [mailto:[email protected]] > Gesendet: Donnerstag, 13. Dezember 2018 14:13 > An: Stefan Theil > Cc: U-Boot Mailing List > Betreff: Re: [U-Boot] [PATCH] zynq-gem: Flush cache before handing RX > packet to receive handler > > On Thu, Dec 13, 2018 at 6:18 PM Stefan Theil <[email protected]> > wrote: > > > > The cache was only flushed before *transmitting* packets, but not when > > receiving them, leading to an issue where new packets were handed to > > the receive handler with old contents in cache. This only happens when > > a lot of packets are received without sending packages every now and > > then. > > > > Signed-off-by: Stefan Theil <[email protected]> > > --- > > drivers/net/zynq_gem.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index > > 9bd79b198a..5825b6dd99 100644 > > --- a/drivers/net/zynq_gem.c > > +++ b/drivers/net/zynq_gem.c > > @@ -621,6 +621,9 @@ static int zynq_gem_recv(struct udevice *dev, int > > flags, uchar **packetp) > > > > *packetp = (uchar *)(uintptr_t)addr; > > > > + flush_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, > > + ARCH_DMA_MINALIGN)); > > Shouldn't it be invalidate_dcache_range()? > > > + barrier(); > > + > > return frame_len; > > } > > > > Regards, > Bin _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
