On 12/28/18 7:57 AM, Ooi, Joyce wrote: >> -----Original Message----- >> From: Marek Vasut [mailto:ma...@denx.de] >> Sent: Thursday, December 27, 2018 4:21 PM >> To: Ooi, Joyce <joyce....@intel.com>; Joe Hershberger >> <joe.hershber...@ni.com> >> Cc: See, Chin Liang <chin.liang....@intel.com>; Ong, Hean Loong >> <hean.loong....@intel.com>; Priyanka Jain <priyanka.j...@nxp.com>; u- >> b...@lists.denx.de >> Subject: Re: [U-Boot] [PATCH v3] net: phy: add TSE PCS support to dwmac- >> socfpga >> >> On 12/27/18 7:16 AM, Ooi, Joyce wrote: >>>> -----Original Message----- >>>> From: Marek Vasut [mailto:ma...@denx.de] >>>> Sent: Thursday, December 27, 2018 2:55 AM >>>> To: Ooi, Joyce <joyce....@intel.com>; Joe Hershberger >>>> <joe.hershber...@ni.com> >>>> Cc: See, Chin Liang <chin.liang....@intel.com>; Ong, Hean Loong >>>> <hean.loong....@intel.com>; Priyanka Jain <priyanka.j...@nxp.com>; u- >>>> b...@lists.denx.de >>>> Subject: Re: [U-Boot] [PATCH v3] net: phy: add TSE PCS support to >>>> dwmac- socfpga >>>> >>>> On 12/26/18 8:47 AM, Ooi, Joyce wrote: >>>>> Adding Marek. >>>>> >>>>>> -----Original Message----- >>>>>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of >>>>>> Ooi, Joyce >>>>>> Sent: Tuesday, November 27, 2018 5:40 PM >>>>>> To: Joe Hershberger <joe.hershber...@ni.com> >>>>>> Cc: Ong, Hean Loong <hean.loong....@intel.com>; Priyanka Jain >>>>>> <priyanka.j...@nxp.com>; See, Chin Liang >>>>>> <chin.liang....@intel.com>; >>>>>> u- b...@lists.denx.de >>>>>> Subject: Re: [U-Boot] [PATCH v3] net: phy: add TSE PCS support to >>>>>> dwmac- socfpga >>>>>> >>>>>> Hi Joe, >>>>>> >>>>>> Any comments/feedback on this v3 patch? >>>> >>>> I thought we already had TSE support in drivers/net/altera_tse.c , is >>>> this related ? >>> drivers/net/altera_tse.c is a different IP, which contains of MAC >>> driver from Intel FPGA and PCS driver from Intel FPGA using MDIO PMA. >>> >>> This net/phy/altr_tse_pcs.c is the Physical Coding Sublayer for DWMAC SGMII >> IP. >>> The DWMAC SGMII IP contains of MAC driver from DWMAC (Synopsis) and >>> PCS driver from Intel FPGA controlling Marvell PHY. >> >> Does this patch need to be split into two (three) patches then ? > This patch adds TSE PCS support to existing dwmac-socfpga.c and designware.c, > which adds a new file net/phy/altr_tse_pcs.c, while dwmac-socfpga.c and > designware.c call its functions. Hence, I didn't split this implementation > into several > patches because I didn't want net/phy/altr_tse_pcs.c to appear like a dead > code. > > If it's confusing, I could rename altr_tse_pcs.c to altr_dwmac_pcs.c, since > it is > under DWMAC SGMII.
Is it a separate block which could be used by both Altera TSE and DWMAC or not ? -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot