On Wed, Jan 2, 2019 at 9:13 PM Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> wrote: > > Hi Marek, > > Am 14.11.2018 um 19:51 schrieb Simon Goldschmidt: > > On 07.10.2018 02:49, Tom Rini wrote: > >> On Sun, Sep 30, 2018 at 02:31:53PM +0200, Simon Goldschmidt wrote: > >> > >>> Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig with > >>> help from moveconfig.py (only had to prepare socfpga, > >>> stm32f746 and am33x/43x manually) > >>> > >>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> > >>> --- > >>> > >>> This patch is in preparation for boot-from-FPGA for > >>> socfpga cyclone5, where we need a different SPL_TEXT_BASE. > >>> By moving this to Kconfig, this can then be done via > >>> defconfig. > >>> > >>> I did notice that some defconfig files change more than > >>> necessary, it seems like they are out of sync? > >> So, I see at least one set of problems with the conversion, the am33* > >> family gets put to 0x0 which isn't right. I'm going to pull out the > >> print tool I made and posted a while back and use that for conversion. > >> Thanks for the starting point! > > > > Tom, what's the status on this? I still can't build an SPL for socfpga > > gen5 boot from FPGA because I can't change SPL_TEXT_BASE. > > > > Marek, if getting CONFIG_SPL_TEXT_BASE into 2019.01 won't work, can we > > have a separate (k)config option for socfpga only? That might be useful > > anyway as when booting from fpga, there is no 64 KByte size limit and > > the "magic value into magic register to unlock support for issuing warm > > reset" must not be written as the SPL is not in SRAM. But that might > > have its separate config option, too... > > > > Anyway, I just need input to know in which direction I should continue. > > I'm waiting to get all our versions of SPL and U-Boot running from > > mainline (with only board configs added for our private boards). > > I still cannot build an SPL to boot from FPGA since CONFIG_SPL_TEXT_BASE > is hard-coded to OnChip RAM (while when booting from FPGA, it has to be > placed into the FPGA bridge). > > Since both Tom and myself did not seem to have immediate luck with > bringing CONFIG_SPL_TEXT_BASE to Kconfig, may I suggest to add a Kconfig > option 'Boot from FPGA' for socfpga_gen5? > > Or do you have another idea at hand of how to proceed here? > > Please note that there might be other settings that may change when > booting from FPGA, e.g. the maximum code size for SPL is not limited any > more.
Gentle ping? I'd really like to get boot-from-FPGA finally working in the next release! Thanks, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot