From: Jorge Ramirez-Ortiz <jrami...@baylibre.com>
Some IPs like the meson VPU have a specific way to write to dw_hdmi
registers. Make it configurable.
Signed-off-by: Jorge Ramirez-Ortiz <jrami...@baylibre.com>
[added commit description]
Signed-off-by: Maxime Jourdan <mjour...@baylibre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
drivers/video/dw_hdmi.c | 14 ++++++++++++--
include/dw_hdmi.h | 2 ++
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 229bd63c97..e03f24fa98 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -52,7 +52,7 @@ static const struct tmds_n_cts n_cts_table[] = {
}
};
-static void hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset)
+static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset)
{
switch (hdmi->reg_io_width) {
case 1:
@@ -67,7 +67,7 @@ static void hdmi_write(struct dw_hdmi *hdmi, u8 val, int
offset)
}
}
-static u8 hdmi_read(struct dw_hdmi *hdmi, int offset)
+static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset)
{
switch (hdmi->reg_io_width) {
case 1:
@@ -82,6 +82,10 @@ static u8 hdmi_read(struct dw_hdmi *hdmi, int offset)
return 0;
}
+static u8 (*hdmi_read)(struct dw_hdmi *hdmi, int offset) = dw_hdmi_read;
+static void (*hdmi_write)(struct dw_hdmi *hdmi, u8 val, int offset) =
+ dw_hdmi_write;
+
static void hdmi_mod(struct dw_hdmi *hdmi, unsigned reg, u8 mask, u8 data)
{
u8 val = hdmi_read(hdmi, reg) & ~mask;
@@ -754,6 +758,12 @@ void dw_hdmi_init(struct dw_hdmi *hdmi)
HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT |
HDMI_IH_MUTE_MUTE_ALL_INTERRUPT;
+ if (hdmi->write_reg)
+ hdmi_write = hdmi->write_reg;
+
+ if (hdmi->read_reg)
+ hdmi_read = hdmi->read_reg;
+
hdmi_write(hdmi, ih_mute, HDMI_IH_MUTE);
/* enable i2c master done irq */
diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h
index 23088ec768..35edc189c0 100644
--- a/include/dw_hdmi.h
+++ b/include/dw_hdmi.h
@@ -472,6 +472,8 @@ struct dw_hdmi {
u8 reg_io_width;
int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock);
+ void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset);
+ u8 (*read_reg)(struct dw_hdmi *hdmi, int offset);
};
int dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock);
--
2.20.1
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