On 01/17/2019 11:38 AM, Anup Patel wrote:
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB ethernet stops working
for U-Boot because it is a 32bit DMA capable device.
To handle 32bit DMA capable devices on 64bit systems, we provide
custom implementation of board_get_usable_ram_top() which ensures
that usable ram top is not more then 4GB. This in-turn ensures
that U-Boot always runs within 4GB hence DMA addresses generated
by DMA mapping APIs will be within 4GB too.
Signed-off-by: Anup Patel <anup.pa...@wdc.com>
Signed-off-by: Atish Patra <atish.pa...@wdc.com>
You could probably write that with MIN() more easily, but this way works
fine too.
Reviewed-by: Alexander Graf <ag...@suse.de>
Alex
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