On Tue, Feb 19, 2019 at 1:44 AM Marek Vasut <ma...@denx.de> wrote: > > Configure the PL310 tag and data latency registers, which slightly > improves performance and aligns the behavior with Linux. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Dalon Westergreen <dwest...@gmail.com> > Cc: Dinh Nguyen <dingu...@kernel.org> > --- > arch/arm/mach-socfpga/misc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > index 78fbe28724..1ea4e32c11 100644 > --- a/arch/arm/mach-socfpga/misc.c > +++ b/arch/arm/mach-socfpga/misc.c > @@ -62,6 +62,9 @@ void v7_outer_cache_enable(void) > /* Disable the L2 cache */ > clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); > > + writel(0x111, &pl310->pl310_tag_latency_ctrl); > + writel(0x121, &pl310->pl310_data_latency_ctrl);
Would it make sense to add defines as named constants for this? OTOH, in Linux, the values in the devicetree aren't really described, either, so: Reviewed-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> Regards, Simon > + > /* enable BRESP, instruction and data prefetch, full line of zeroes */ > setbits_le32(&pl310->pl310_aux_ctrl, > L310_AUX_CTRL_DATA_PREFETCH_MASK | > -- > 2.19.2 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
