The SPL size on Gen5 is 4*64kiB, but on A10 it is 4*256kiB. Handle the difference.
Signed-off-by: Marek Vasut <ma...@denx.de> Cc: Chin Liang See <chin.liang....@intel.com> Cc: Dinh Nguyen <dingu...@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> Cc: Tien Fong Chee <tien.fong.c...@intel.com> --- include/configs/socfpga_common.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f182e9e71b..181af9b646 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -275,12 +275,20 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 +#endif #endif /* SPL NAND boot support */ #ifdef CONFIG_SPL_NAND_SUPPORT +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000 +#endif #endif /* -- 2.20.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot