On Tue, Mar 5, 2019 at 10:55 PM Joe Hershberger <joe.hershber...@ni.com> wrote: > > On Tue, Mar 5, 2019 at 10:17 AM Jagan Teki <ja...@amarulasolutions.com> wrote: > > > > On Sat, Mar 2, 2019 at 12:29 AM Joe Hershberger <joe.hershber...@ni.com> > > wrote: > > > > > > On Wed, Feb 27, 2019 at 12:59 PM Jagan Teki <ja...@amarulasolutions.com> > > > wrote: > > > > > > > > Unlike other Allwinner SoC's R40 GMAC clock control register > > > > is locate in CCU, but rest located via syscon itself. Since > > > > the phandle property for current code look for 'syscon' and > > > > it will grab the respective ccu or syscon base address based > > > > on DT property defined in respective SoC dtsi. > > > > > > > > So, use the existing 'syscon' code even for R40 for retrieving > > > > GMAC clock via CCU and update the register directly in > > > > sun8i_emac_set_syscon instead of writing it separately using > > > > ccm base. > > > > > > > > Cc: Joe Hershberger <joe.hershber...@ni.com> > > > > Cc: Lothar Felten <lothar.fel...@gmail.com> > > > > Signed-off-by: Jagan Teki <ja...@amarulasolutions.com> > > > > --- > > > > drivers/net/sun8i_emac.c | 55 ++++++++++++++++++++-------------------- > > > > 1 file changed, 27 insertions(+), 28 deletions(-) > > > > > > > > diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c > > > > index c9798445c7..a7fb7ac405 100644 > > > > --- a/drivers/net/sun8i_emac.c > > > > +++ b/drivers/net/sun8i_emac.c > > > > @@ -285,10 +285,18 @@ static int sun8i_emac_set_syscon(struct > > > > sun8i_eth_pdata *pdata, > > > > int ret; > > > > u32 reg; > > > > > > > > - reg = readl(priv->sysctl_reg + 0x30); > > > > + if (priv->variant == R40_GMAC) { > > > > + /* Select RGMII for R40 */ > > > > + reg = readl(priv->sysctl_reg + 0x164); > > > > > > Please don't add more magic numbers. #define with register name. > > > > I do prefer the same, but kept it as same as original. and there are > > other place do have similar reg magic numbers. Will clean it up all > > in separate patch. would that be okay? > > OK. This cam in after the merge window closed, right? If so, please > move the cleanup patch before this one in the next version.
It's been in ML many releases, but I will send PR in next MW. mean while I'll push it on my sunxi/next and will send separate patch about the cleanup. will that be fine? _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot