Hi All,
I'm not sure if this is the place to ask this, please redirect if it isn't.
I'm looking into using a BDI3000 with a P2020RDB evaluation kit we've
already purchased from Denx, but there is some confusion over how the
board hardware handles the power on boot configuration signals to the
processor. The addenda to the P2020RDB manuals provided by Freescale
seem to indicate that certain boot functions that are supposed to be
configurable using dipswitches on the board do not work as they should,
notably certain clock speeds and the SPI and eSDHC boot configurations,
which are the two options I am keen to exercise before moving on to
prototyping.
Is a BDI3000, (using bdiGDB?), able to override the signals on these
pins using JTAG functionality? Essentially, what I would like is some
way of finding out if the P2020 is obtaining the correct PLL ratio and
boot ROM location from the signals, and more importantly, override any
erroneus signals that the hardware on the platform (P2020RDB and later,
the prototype) might be providing (or failing to provide) it. (without
using an oscilloscope and a soldering iron that is).
Regards,
Can Aydin
--
*Can Aydin*
Software Engineer
Locata Corporation
can.ay...@locatacorp.com
Locata Corporation Pty Ltd
Level 1, 111 Canberra Ave
Griffith ACT 2603 Australia
Phone +612 6126 5734
Fax +612 6126 5704
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