On 28.02.19 22:11, Chris Packham wrote:
From: Chris Packham <chris.pack...@alliedtelesis.co.nz>Based on the JEDEC standard JESD79-3F. The tRAS timings should include the highest speed bins at a given frequency. This is similar to commit 683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong comparison was used in the initial implementation. Signed-off-by: Chris Packham <chris.pack...@alliedtelesis.co.nz> [https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15] Signed-off-by: Chris Packham <judge.pack...@gmail.com>
Applied to u-boot-marvell/master. Thanks, Stefan _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
