From: Brad Griffis <bgrif...@ti.com> Adjust DQS skew in case where invert_clkout=1 is used. Match recommended values from EMIF Tools app note:
http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgrif...@ti.com> Signed-off-by: Keerthy <j-keer...@ti.com> --- arch/arm/mach-omap2/am33xx/ddr.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c index be6f4d72cc..816d4e8e05 100644 --- a/arch/arm/mach-omap2/am33xx/ddr.c +++ b/arch/arm/mach-omap2/am33xx/ddr.c @@ -256,8 +256,16 @@ static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr) * Enable hardware leveling on the EMIF. For details about these * magic values please see the EMIF registers section of the TRM. */ - writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1); - writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw); + if (regs->emif_ddr_phy_ctlr_1 & 0x00040000) { + /* PHY_INVERT_CLKOUT = 1 */ + writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1); + writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw); + } else { + /* PHY_INVERT_CLKOUT = 0 */ + writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1); + writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw); + } + writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22); writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22_shdw); writel(0x00600020, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_23); -- 2.17.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
