Hi Tom, I am sending you some patches related to Xilinx devices and fpga framework. There are minimal changes in xilinx drivers and one patch which fixes EXT_DTB usage reviewed by Simon.
Builds look good. https://travis-ci.org/michalsimek/u-boot/builds/520747035 Thanks, Michal The following changes since commit 216800acf1fbf9f498455bf3c92d4513d9a4c681: Merge branch 'master' of git://git.denx.de/u-boot-spi (2019-04-14 00:03:06 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2019.07 for you to fetch changes up to 350cfe79a8fb288e9066d5668af7c5ab6857edea: arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI (2019-04-16 11:52:02 +0200) ---------------------------------------------------------------- Xilinx/FPGA changes for v2019.07 fpga: - Add support for external data in FIT - Extend testing for external data case - Inform user about a need to run post config on Zynq arm: - Tune zynq command functions - Fix internal variable setting arm64: - Add support for zc39dr decoding - Disable WDT for zcu100 - Small changes in reset_reason() - Some DT changes (spi) - Tune qspi-mini configuration - Remove useless eeprom setting - Fix two sdhci boot case spi: - Fix tap delay programming clk: - Enable i2c in SPL net: - Fix gem phydev handling - Remove phy detection code from gem driver general: - Correct EXT_DTB usage for MULTI_DTB_FIT configuration ---------------------------------------------------------------- Hannes Schmelzer (1): ARM: zynq: Add missing i2c get_rate for fixing i2c SPL Luca Ceresoli (1): arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI Melin Tomas (1): ARM: zynq: fix environment command syntax Michal Simek (6): test: py: Extend fpga test with fit image with external data arm64: zynqmp: Disable WDT for zcu100 arm64: zynqmp: Add debug message about clearing BSS Makefile: Prioritize external dtb if defined net: gem: Remove phy autodetection code arm64: zynqmp: Remove eeprom setting Siva Durga Prasad Paladugu (7): spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz arm64: zynqmp: Add spi-flash compatible string to flash node arm64: zynqmp: Define label for flash node arm64: xilinx: zynqmp: Remove unneeded configs arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR arm: zynq: Add an info message about post config net: zynq_gem: Modify phy supported features after max-speed was set T Karthik Reddy (2): arm64: zynqmp: Use zynqmp_mmio_read/write functions ARM: zynq: Check zynq aes & rsa command parameters count Tien Fong Chee (2): fpga: Add support for getting external data address and length fpga: Replace char * with const char * for filename Makefile | 5 +++++ arch/arm/dts/zynqmp-mini-qspi.dts | 4 ++-- arch/arm/mach-zynqmp/spl.c | 3 ++- board/xilinx/zynq/cmds.c | 9 ++++++++- board/xilinx/zynqmp/zynqmp.c | 20 ++++++++++++++------ cmd/fpga.c | 6 +++--- configs/xilinx_zynqmp_mini_qspi_defconfig | 2 ++ configs/xilinx_zynqmp_zcu100_revC_defconfig | 2 -- drivers/clk/clk_zynq.c | 2 ++ drivers/fpga/zynqpl.c | 5 ++++- drivers/net/zynq_gem.c | 53 +++-------------------------------------------------- drivers/spi/zynqmp_gqspi.c | 4 ++-- include/configs/xilinx_zynqmp.h | 9 --------- include/configs/zynq-common.h | 8 ++++---- include/fpga.h | 2 +- test/py/tests/test_fpga.py | 13 +++++++++++++ 16 files changed, 65 insertions(+), 82 deletions(-) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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