Hi Marek, > On 6/19/19 12:01 AM, Lukasz Majewski wrote: > > The code responsible for setting proper values in the MUX registers > > (in the mxs_pinctrl_set_state()) has been ported from Linux kernel > > - SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable. > > Maybe you want to keep the DTs and this driver based off the same > version of Linux kernel.
I will keep and used the v5.1.11 in both drivers.
>
> Tags are "pinctrl: mxs: ".
I will fix the tags globally.
>
> > As the pinctrl node in the imx28.dtsi file has gpio pins nodes as
> > subnodes, it was necessary to use 'dm_scan_fdt_dev()' (as a .bind
> > method) to also make them 'visible' by the DM's "gpio_mxs" driver.
> >
> > Signed-off-by: Lukasz Majewski <lu...@denx.de>
> >
>
> [...]
>
> > +static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void
> > __iomem *reg) +{
> > + u32 tmp;
>
> This is clrsetbits_le32() reimplementation.
Ach, right. I will leave the mxs_pinctrl_rmwl wrapper function and
replace below code with clrsetbits_le32.
>
> > + tmp = readl(reg);
> > + tmp &= ~(mask << shift);
> > + tmp |= value << shift;
> > + writel(tmp, reg);
> > +}
> [...
>
Best regards,
Lukasz Majewski
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