This Patch adds support for the EMK TOP7000 CPU Module
Part 1: new files
Signed-off-by: Reinhard Meyer reinhard.me...@emk-elektronik.de
---
board/emk/top7000/Makefile | 41 ++++++++
board/emk/top7000/config.mk | 3 +
board/emk/top7000/top7000.c | 165 ++++++++++++++++++++++++++++++++
board/emk/top7000/u-boot.lds | 72 ++++++++++++++
include/configs/top7000.h | 214
++++++++++++++++++++++++++++++++++++++++++
5 files changed, 495 insertions(+), 0 deletions(-)
create mode 100644 board/emk/top7000/Makefile
create mode 100644 board/emk/top7000/config.mk
create mode 100644 board/emk/top7000/top7000.c
create mode 100644 board/emk/top7000/u-boot.lds
create mode 100644 include/configs/top7000.h
diff --git a/board/emk/top7000/Makefile b/board/emk/top7000/Makefile
new file mode 100644
index 0000000..a36cc86
--- /dev/null
+++ b/board/emk/top7000/Makefile
@@ -0,0 +1,41 @@
+#
+# Copyright (C) 2005-2006 Atmel Corporation
+# Copyright (C) 2010 EMK Elektronik
+#
+# See file CREDITS for list of people who contributed to this project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o ../common/vpd.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/emk/top7000/config.mk b/board/emk/top7000/config.mk
new file mode 100644
index 0000000..9a794e5
--- /dev/null
+++ b/board/emk/top7000/config.mk
@@ -0,0 +1,3 @@
+TEXT_BASE = 0x00000000
+PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
+PLATFORM_LDFLAGS += --gc-sections
diff --git a/board/emk/top7000/top7000.c b/board/emk/top7000/top7000.c
new file mode 100644
index 0000000..a8edb91
--- /dev/null
+++ b/board/emk/top7000/top7000.c
@@ -0,0 +1,165 @@
+/*
+ * Copyright (C) 2006 Atmel Corporation
+ * COpyright (C) 2010 EMK Elektronik
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+
+#include <asm/io.h>
+#include <asm/sdram.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/hmatrix.h>
+#include <asm/arch/portmux.h>
+#include <netdev.h>
+#include <i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct sdram_config sdram_config = {
+ .data_bits = SDRAM_DATA_16BIT,
+ .row_bits = 13,
+ .col_bits = 9,
+ .bank_bits = 2,
+ .cas = 3,
+ .twr = 2,
+ .trc = 7,
+ .trp = 2,
+ .trcd = 2,
+ .tras = 5,
+ .txsr = 5,
+ /* 7.81 us */
+ .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
+};
+
+int board_early_init_f(void)
+{
+ /* Enable SDRAM in the EBI mux */
+ hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
+
+ /* 16 data, 26 address lines */
+ portmux_enable_ebi(16, 26, 0, PORTMUX_DRIVE_HIGH);
+ portmux_enable_usart1(PORTMUX_DRIVE_MIN);
+
+#if defined(CONFIG_MACB)
+ portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
+ portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
+#endif
+#if defined(CONFIG_MMC)
+ portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
+#endif
+#if defined(CONFIG_ATMEL_SPI)
+ portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
+#endif
+#ifdef CONFIG_CMD_I2C
+ // first select SCL and SDA gpio
+ portmux_select_gpio(PORTMUX_PORT_A,(1<<SDA_PIN),
PORTMUX_DIR_OUTPUT|PORTMUX_INIT_LOW|PORTMUX_OPEN_DRAIN);
+ portmux_select_gpio(PORTMUX_PORT_A,(1<<SCL_PIN),
PORTMUX_DIR_OUTPUT|PORTMUX_INIT_LOW|PORTMUX_OPEN_DRAIN);
+ // initialize i2c
+ i2c_init(0, 0);
+#endif
+ return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+ unsigned long expected_size;
+ unsigned long actual_size;
+ void *sdram_base;
+
+ sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+
+ expected_size = sdram_init(sdram_base, &sdram_config);
+ actual_size = get_ram_size(sdram_base, expected_size);
+
+ unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
+
+ if (expected_size != actual_size)
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+
+ return actual_size;
+}
+
+int board_early_init_r(void)
+{
+ gd->bd->bi_phy_id[0] = 0x01;
+ gd->bd->bi_phy_id[1] = 0x03;
+ return 0;
+}
+
+int misc_init_r (void)
+{
+ /* read 'factory' part of EEPROM */
+ extern void read_factory_r (void);
+ read_factory_r ();
+ return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bi)
+{
+ macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+ macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
+ return 0;
+}
+#endif
+
+/* SPI chip select control */
+#ifdef CONFIG_ATMEL_SPI
+#include <spi.h>
+
+#define DATAFLASH_CS_PIN GPIO_PIN_PA(3)
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ gpio_set_value(DATAFLASH_CS_PIN, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ gpio_set_value(DATAFLASH_CS_PIN, 1);
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+/* I2C access functions */
+#ifdef CONFIG_CMD_I2C
+
+int iic_read(void)
+{
+ return pio_get_input_value(GPIO_PIN_PA(SDA_PIN));
+}
+
+void iic_sda(int bit)
+{
+ pio_set_output_value(GPIO_PIN_PA(SDA_PIN),bit);
+}
+
+void iic_scl(int bit)
+{
+ pio_set_output_value(GPIO_PIN_PA(SCL_PIN),bit);
+}
+
+#endif /* CONFIG_CMD_I2C */
diff --git a/board/emk/top7000/u-boot.lds b/board/emk/top7000/u-boot.lds
new file mode 100644
index 0000000..a7243f2
--- /dev/null
+++ b/board/emk/top7000/u-boot.lds
@@ -0,0 +1,72 @@
+/* -*- Fundamental -*-
+ *
+ * Copyright (C) 2005-2006 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+OUTPUT_ARCH(avr32)
+ENTRY(_start)
+
+SECTIONS
+{
+ . = 0;
+ _text = .;
+ .text : {
+ *(.exception.text)
+ *(.text)
+ *(.text.*)
+ }
+ _etext = .;
+
+ .rodata : {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ . = ALIGN(8);
+ _data = .;
+ .data : {
+ *(.data)
+ *(.data.*)
+ }
+
+ . = ALIGN(4);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : {
+ KEEP(*(.u_boot_cmd))
+ }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ _got = .;
+ .got : {
+ *(.got)
+ }
+ _egot = .;
+
+ . = ALIGN(8);
+ _edata = .;
+
+ .bss : {
+ *(.bss)
+ *(.bss.*)
+ }
+ . = ALIGN(8);
+ _end = .;
+}
diff --git a/include/configs/top7000.h b/include/configs/top7000.h
new file mode 100644
index 0000000..f47f072
--- /dev/null
+++ b/include/configs/top7000.h
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2006 Atmel Corporation
+ * Copyright (C) 2010 EMK Elektronik
+ *
+ * Configuration settings for the TOP7000 CPU Module
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * TOP7000 differences to ATNGW100
+ *
+ * parallel FLASH upto 64MB (typically SPANSION)
+ * no serial FLASH (SPI not used)
+ * optional micro SD card for root and user file systems
+ * VPD and environment in I2C EEPROM
+ * kernel as image in parallel FLASH
+ *
+ * parallel FLASH partitioning:
+ * 00000000-00020000 128k U-Boot
+ * 00020000-00200000 2M-128k kernel
+ * 00200000-end root file system
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/memory-map.h>
+
+#define CONFIG_AVR32 1
+#define CONFIG_AT32AP 1
+#define CONFIG_AT32AP7000 1
+#define CONFIG_TOP7000 1
+
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
+ * and the PBA bus to run at 1/4 the PLL frequency.
+ */
+#define CONFIG_PLL 1
+#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_SYS_OSC0_HZ 20000000
+#define CONFIG_SYS_PLL0_DIV 1
+#define CONFIG_SYS_PLL0_MUL 7
+#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
+#define CONFIG_SYS_CLKDIV_CPU 0
+#define CONFIG_SYS_CLKDIV_HSB 1
+#define CONFIG_SYS_CLKDIV_PBA 2
+#define CONFIG_SYS_CLKDIV_PBB 1
+
+/*
+ * The PLLOPT register controls the PLL like this:
+ * icp = PLLOPT<2>
+ * ivco = PLLOPT<1:0>
+ *
+ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
+ */
+#define CONFIG_SYS_PLL0_OPT 0x04
+
+#define CONFIG_USART1 1
+
+/* User serviceable stuff */
+#define CONFIG_DOS_PARTITION 1
+
+#define CONFIG_CMDLINE_TAG 1
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+#define CONFIG_STACKSIZE (2048)
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_BOOTARGS "console=ttyS0 root=/dev/mtdblock2
rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "bootm 0xa0020000"
+
+/*
+ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
+ * data on the serial line may interrupt the boot sequence.
+ */
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_AUTOBOOT 1
+#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d
seconds\n", bootdelay
+#define CONFIG_AUTOBOOT_DELAY_STR "d"
+#define CONFIG_AUTOBOOT_STOP_STR " "
+
+#define CONFIG_NET_MULTI 1
+
+/*
+ * BOOTP/DHCP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+
+#define CONFIG_DOS_PARTITION 1
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SOURCE
+#undef CONFIG_CMD_XIMG
+
+#define CONFIG_ATMEL_USART 1
+#define CONFIG_MACB 1
+#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_SYS_NR_PIOS 5
+#define CONFIG_SYS_HSDRAMC 1
+#define CONFIG_MMC 1
+#define CONFIG_ATMEL_MCI 1
+
+#define CONFIG_SYS_DCACHE_LINESZ 32
+#define CONFIG_SYS_ICACHE_LINESZ 32
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_EMPTY_INFO 1
+
+/* I2C configuration */
+#define CONFIG_SOFT_I2C 1 /* I2C with
software support */
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave
address defaults */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define SDA_PIN 6
+#define SCL_PIN 7
+#define I2C_SOFT_DECLARATIONS int iic_read(void); void iic_sda(int);
void iic_scl(int);
+#define I2C_ACTIVE
+#define I2C_TRISTATE
+#define I2C_READ iic_read()
+#define I2C_SDA(bit) iic_sda(bit)
+#define I2C_SCL(bit) iic_scl(bit)
+#define I2C_DELAY udelay(3)
+
+/* EEPROM configuration */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_EEPROM_SIZE 0x2000
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
+#define CONFIG_MISC_INIT_R
+
+/* Environment settings */
+#define CONFIG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_OFFSET 0x1000
+#define CONFIG_ENV_SIZE 0x0700
+#define CONFIG_ENV_OVERWRITE
+
+/* VPD settings */
+#define CONFIG_SYS_I2C_FACT_ADDR 0x57
+#define CONFIG_SYS_FACT_OFFSET 0x1800
+#define CONFIG_SYS_FACT_SIZE 0x0800
+
+/* MAX 64MB S29GL512Pxxx, 512 sectors */
+#define CONFIG_SYS_FLASH_BASE 0x00000000
+#define CONFIG_SYS_FLASH_SIZE 0x4000000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 512
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
+#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
+#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE +
CONFIG_SYS_INTRAM_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN (256*1024)
+#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
+
+/* Allow 4MB for the kernel run-time image */
+#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
+#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
+
+/* Other configuration settings that shouldn't have to change all that
often */
+#define CONFIG_SYS_PROMPT "top7000> "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +
sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP 1
+
+#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START +
0x1f00000)
+
+#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
+
+#endif /* __CONFIG_H */
--
1.5.6.5
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