On 6/23/19 8:06 AM, Heinrich Schuchardt wrote: >>> Hello Marek, >>> >>> please, have a look at arch/arm/lib/interrupts.c. >>> >>> If the processor is in thumbs mode when crashing the output is formatted >>> in a different way than when not in thumbs mode, cf. dump_instr(). Is >>> there something wrong with the thumbs mode detection? >> >> Well, try maybe objdump ? >> >> What is more plausible, that the above completely nonsensical >> disassembly actually works and the CPU triggers undefined instruction -- >> or that the CPU is actually in thumb mode (hint: imx6 u-boot builds are >> built in thumb2) and there's a bug in efi_device_path.c ? I think the >> later. >> >> I think maybe you should slow down and consider this option. >> > > On a Wandboard which is also imx I had a look at the output of exceptions: > > => exception unaligned > > data abort > > pc : [<8f7a2b1a>] lr : [<8f7ab1b7>] > > reloc pc : [<1780cb1a>] lr : [<178151b7>] > > sp : 8ed8c3f8 ip : 8f7a2b15 fp : 00000002 > > r10: 8f7f81f0 r9 : 8ed95ea8 r8 : 8ed99488 > > r7 : 8f7ab109 r6 : 00000000 r5 : 8ed8c3f9 r4 : 8f7f6358 > r3 : 8ed9948c r2 : 00000001 r1 : 00000000 r0 : 8f7f6358 > Flags: nzCv IRQs off FIQs off Mode SVC_32 > Code: 8f7e1907 8f7e191f 8f7e193d f105466d (e9d50501) > Resetting CPU ... > > cat u-boot.map > > .text.do_unaligned > 0x1780cb14 0xe cmd/built-in.o > > objdump -S -D cmd/arm/exception.o > > 00000000 <do_unaligned>: > /* > * The LDRD instruction requires the data source to be four > byte aligned > * even if strict alignment fault checking is disabled in the > system > * control register. > */ > asm volatile ( > 0: 466d mov r5, sp > 2: f105 0501 add.w r5, r5, #1 > 6: e9d5 6700 ldrd r6, r7, [r5] > "MOV r5, sp\n" > "ADD r5, #1\n" > "LDRD r6, r7, [r5]\n"); > return CMD_RET_FAILURE; > } > a: 2001 movs r0, #1 > c: 4770 bx lr > > So there is a bug in arch/arm/lib/interrupts.c such that it does not > detect thumb mode and outputs the code arround PC incorrectly. > > Macro thumb_mode(regs) returns 0 though the thumbs flag is set: > > CPSR: 200001f3 > THUMBS_FLAG: 00000020 > > The reason is that in arch/arm/include/asm/proc-armv/ptrace.h > we are checking non-existent CONFIG_ARM_THUMB. We should check > CONFIG_IS_ENABLED(SYS_THUMB_BUILD). > > I will send a patch to correct this. With the patch applied the output > is correct: > > => exception unaligned > > data abort > > pc : [<8f7a2b52>] lr : [<8f7ab1ef>] > > reloc pc : [<1780cb52>] lr : [<178151ef>] > > sp : 8ed8c3f8 ip : 8f7a2b4d fp : 00000002 > > r10: 8f7f8228 r9 : 8ed95ea8 r8 : 8ed99488 > > r7 : 8f7ab141 r6 : 00000000 r5 : 8ed8c3f9 r4 : 8f7f6390 > > r3 : 8ed9948c r2 : 00000001 r1 : 00000000 r0 : 8f7f6390 > Flags: nzCv IRQs off FIQs off Mode SVC_32 (T) > Code: 8f7e 466d f105 0501 (e9d5) 6700 > Resetting CPU ... > > Thanks for rubbing my nose into it.
No problem. -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
