If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
provides recalculated clock value without considering the cache setting.
This may be necessary for some clocks tightly coupled with power domains
(i.e. imx8), and prevents from reading invalid cached values.
Signed-off-by: Lukasz Majewski <lu...@denx.de>
Reviewed-by: Peng Fan <peng....@nxp.com>
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
drivers/clk/clk-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 506ba6014c..5acf186b01 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -410,8 +410,8 @@ long long clk_get_parent_rate(struct clk *clk)
if (!ops->get_rate)
return -ENOSYS;
- /* Read the 'rate' if not already set */
- if (!pclk->rate)
+ /* Read the 'rate' if not already set or if proper flag set*/
+ if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
pclk->rate = clk_get_rate(pclk);
return pclk->rate;
--
2.11.0
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