The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/mach-uniphier/dram_init.c | 5 ++++-
include/configs/uniphier.h | 6 ------
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram_init.c
b/arch/arm/mach-uniphier/dram_init.c
index 970fa09ef03c..13821a928831 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -33,7 +33,7 @@ static int uniphier_memconf_decode(struct uniphier_dram_map
*dram_map,
val = readl(sg_base + SG_MEMCONF);
/* set up ch0 */
- dram_map[0].base = CONFIG_SYS_SDRAM_BASE;
+ dram_map[0].base = 0x80000000;
switch (val & SG_MEMCONF_CH0_SZ_MASK) {
case SG_MEMCONF_CH0_SZ_64M:
@@ -255,6 +255,9 @@ int dram_init(void)
gd->ram_size += dram_map[i].size;
+ if (!valid_bank_found)
+ gd->ram_base = dram_map[i].base;
+
prev_top = dram_map[i].base + dram_map[i].size;
valid_bank_found = true;
}
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 6979165260c6..46d576d54aa1 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -90,10 +90,6 @@
#define CONFIG_SYS_NAND_DATA_BASE 0x68000000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
-
/*
* Network Configuration
*/
@@ -215,8 +211,6 @@
#define CONFIG_SYS_BOOTMAPSZ 0x20000000
-#define CONFIG_SYS_SDRAM_BASE 0x80000000
-
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
/* only for SPL */
--
2.17.1
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