On 7/12/19 7:29 AM, Simon Goldschmidt wrote:
> On Fri, Jul 12, 2019 at 7:15 AM Marek Vasut <ma...@denx.de> wrote:
>>
>> On 7/11/19 9:18 PM, Simon Goldschmidt wrote:
>>> The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the
>>> DDR driver does not use bss any more, bss is not used before board_init_r()
>>> and we can remove this hack.
>>>
>>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
>>> ---
>>>
>>>  arch/arm/mach-socfpga/spl_gen5.c | 2 --
>>>  1 file changed, 2 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-socfpga/spl_gen5.c 
>>> b/arch/arm/mach-socfpga/spl_gen5.c
>>> index 87b76b47de..47e63709ad 100644
>>> --- a/arch/arm/mach-socfpga/spl_gen5.c
>>> +++ b/arch/arm/mach-socfpga/spl_gen5.c
>>> @@ -79,8 +79,6 @@ void board_init_f(ulong dummy)
>>>               writel(SYSMGR_ECC_OCRAM_DERR  | SYSMGR_ECC_OCRAM_EN,
>>>                      &sysmgr_regs->eccgrp_ocram);
>>>
>>> -     memset(__bss_start, 0, __bss_end - __bss_start);
>>> -
>>>       socfpga_sdram_remap_zero();
>>>       socfpga_pl310_clear();
>>
>> So who will zero out the BSS ?
> 
> BSS is zeroed by crt0.S, but after board_init_f(), before board_init_r().
> Socfpga just had this double-zeroing because it invalidly used BSS in
> board_init_f().

Can you add that to the commit message and resend just this patch ? I
applied the other one.

> Some weeks ago on this list, we've had a discussion whether it would be good 
> to
> generally allow such early usage of BSS, possibly via a config option (socfpga
> is not the only platform affected). The outcome was negative and so I've 
> started
> this patch.
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