Hi Tom, Please pull some riscv updates:
- Update SiFive Unleashed clock driver. - Enables SiFive SPI driver and MMC SPI driver for SiFive Unleashed board https://travis-ci.org/rickchen36/u-boot-riscv/builds/560423274 Thanks Rick The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2: Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 8911a22aee1e2a176af93ebf502477f2df2fc912: doc: sifive-fu540: Update README for SiFive SPI and MMC SPI drivers (2019-07-19 14:25:06 +0800) ---------------------------------------------------------------- Anup Patel (8): clk: sifive: Factor-out PLL library as separate module clk: sifive: Sync-up WRPLL library with upstream Linux clk: sifive: Sync-up DT bindings header with upstream Linux clk: sifive: Sync-up main driver with upstream Linux clk: sifive: Drop GEMGXL clock driver riscv: sifive: fu540: Setup ethaddr env variable using OTP doc: sifive-fu540: Update README for steps to create FW_PAYLOAD doc: sifive-fu540: Update README for SiFive SPI and MMC SPI drivers Bhargav Shah (1): riscv: sifive: fu540: Enable SiFive SPI and MMC SPI drivers board/sifive/fu540/Kconfig | 7 +- board/sifive/fu540/fu540.c | 122 +++++++++++++++++++++++++++ configs/sifive_fu540_defconfig | 1 + doc/README.sifive-fu540 | 356 ++++++++++++++++++++++++++++++++++++------------------------------------------- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/analogbits/Kconfig | 4 + drivers/clk/analogbits/Makefile | 3 + drivers/clk/{sifive => analogbits}/wrpll-cln28hpc.c | 168 ++++++++++++++++--------------------- drivers/clk/sifive/Kconfig | 10 --- drivers/clk/sifive/Makefile | 4 - drivers/clk/sifive/fu540-prci.c | 123 ++++++++++++++++----------- drivers/clk/sifive/gemgxl-mgmt.c | 60 -------------- include/dt-bindings/clk/sifive-fu540-prci.h | 29 ------- include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++ {drivers/clk/sifive => include/linux/clk}/analogbits-wrpll-cln28hpc.h | 70 ++++++---------- 16 files changed, 487 insertions(+), 490 deletions(-) create mode 100644 drivers/clk/analogbits/Kconfig create mode 100644 drivers/clk/analogbits/Makefile rename drivers/clk/{sifive => analogbits}/wrpll-cln28hpc.c (69%) delete mode 100644 drivers/clk/sifive/gemgxl-mgmt.c delete mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h rename {drivers/clk/sifive => include/linux/clk}/analogbits-wrpll-cln28hpc.h (52%) _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot