The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.

Signed-off-by: Ye Li <ye...@nxp.com>
---
Changes in v2:
 - None

 drivers/spi/fsl_qspi.c | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index e877d99..5706569 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -273,19 +273,9 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
                             INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) |
                             PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
 #endif
-#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
-       defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D)
-       /*
-        * To MX6SX, OPRND0(TX_BUFFER_SIZE) can not work correctly.
-        * So, Use IDATSZ in IPCR to determine the size and here set 0.
-        */
+       /* Use IDATSZ in IPCR to determine the size and here set 0. */
        qspi_write32(priv->flags, &regs->lut[lut_base + 1], OPRND0(0) |
                     PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-#else
-       qspi_write32(priv->flags, &regs->lut[lut_base + 1],
-                    OPRND0(TX_BUFFER_SIZE) |
-                    PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-#endif
        qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
        qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
 
-- 
2.7.4

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to