Hi Peng, > V4: > 1/4: Expose CCF for all > 2/4: Improve commit log > 3/4: Typo fix > 4/4: Drop unneeded initialization
Your patches cause some build breaks on sandbox: https://travis-ci.org/lmajewski/u-boot-dfu/jobs/574198639 and TI: https://travis-ci.org/lmajewski/u-boot-dfu/jobs/574198655 The branch which I've used for testing (with your commits): https://github.com/lmajewski/u-boot-dfu/commits/testing Please fix above errors and resend your patches. > > V3: > 2/4: Fix RST/BYPASS seq issue to avoid glitch > 4/4: ARM clk not use 24M for switch, use pll2_500m Add R-b/A-b tag > Fix pll gate shift bit. > > V2: > 2/4: fix MASK/SHIFT usage > > This is to support i.MX8MM clk driver. > i.MX8MM use similar clock design as i.MX7D, but it has use > different PLL, so we need to add pll14xx driver. And to simplify > the clock usage, import the composite clk driver from Linux Kernel, > then we could have simple clk tree. > > > Peng Fan (4): > clk: imx: expose CCF entry for all > clk: imx: add pll14xx driver > clk: imx: add i.MX8M composite clk support > clk: imx: add i.MX8MM clk driver > > drivers/clk/Kconfig | 2 - > drivers/clk/imx/Kconfig | 16 ++ > drivers/clk/imx/Makefile | 2 + > drivers/clk/imx/clk-composite-8m.c | 170 +++++++++++++++ > drivers/clk/imx/clk-imx8mm.c | 415 > +++++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk-pll14xx.c > | 381 ++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h > | 25 +++ 7 files changed, 1009 insertions(+), 2 deletions(-) > create mode 100644 drivers/clk/imx/clk-composite-8m.c > create mode 100644 drivers/clk/imx/clk-imx8mm.c > create mode 100644 drivers/clk/imx/clk-pll14xx.c > Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
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