On Wed, Aug 28, 2019 at 6:52 PM Andes <ub...@andestech.com> wrote: > > From: Rick Chen <r...@andestech.com> > > Add a v5l2 cache controller driver that is usually found on > Andes RISC-V ae350 platform. It will parse the cache settings > from the dtb. > > In this version tag and data ram control timing can be adjusted > by the requirement from the dtb. > > Signed-off-by: Rick Chen <r...@andestech.com> > Cc: KC Lin <kc...@andestech.com> > --- > drivers/cache/Kconfig | 9 +++ > drivers/cache/Makefile | 1 + > drivers/cache/cache-v5l2.c | 186 > +++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 196 insertions(+) > create mode 100644 drivers/cache/cache-v5l2.c >
Reviewed-by: Bin Meng <bmeng...@gmail.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
