After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).
It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.
Signed-off-by: Lukasz Majewski <lu...@denx.de>
---
Changes in v3: None
Changes in v2:
- New patch
drivers/gpio/mxs_gpio.c | 72 +++++++++++++++++++++++++++++++++++++------------
1 file changed, 55 insertions(+), 17 deletions(-)
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index b2451fdda8..5795155e3e 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -131,9 +131,16 @@ int name_to_gpio(const char *name)
#else /* CONFIG_DM_GPIO */
#include <dm.h>
#include <asm/gpio.h>
+#include <dt-structs.h>
#include <asm/arch/gpio.h>
#define MXS_MAX_GPIO_PER_BANK 32
+#ifdef CONFIG_MX28
+#define dtd_fsl_imx_gpio dtd_fsl_imx28_gpio
+#else /* CONFIG_MX23 */
+#define dtd_fsl_imx_gpio dtd_fsl_imx23_gpio
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
/*
* According to i.MX28 Reference Manual:
@@ -146,6 +153,14 @@ DECLARE_GLOBAL_DATA_PTR;
* Bank 4: 0-20 -> 21 PINS
*/
+struct mxs_gpio_platdata {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_fsl_imx_gpio dtplat;
+#endif
+ unsigned int bank;
+ int gpio_ranges;
+};
+
struct mxs_gpio_priv {
unsigned int bank;
};
@@ -223,22 +238,19 @@ static const struct dm_gpio_ops gpio_mxs_ops = {
static int mxs_gpio_probe(struct udevice *dev)
{
+ struct mxs_gpio_platdata *plat = dev_get_platdata(dev);
struct mxs_gpio_priv *priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- struct fdtdec_phandle_args args;
- int node = dev_of_offset(dev);
char name[16], *str;
- fdt_addr_t addr;
- int ret;
-
- addr = devfdt_get_addr(dev);
- if (addr == FDT_ADDR_T_NONE) {
- printf("%s: No 'reg' property defined!\n", __func__);
- return -EINVAL;
- }
-
- priv->bank = (unsigned int)addr;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_fsl_imx_gpio *dtplat = &plat->dtplat;
+ priv->bank = (unsigned int)dtplat->reg[0];
+ uc_priv->gpio_count = dtplat->gpio_ranges[3];
+#else
+ priv->bank = (unsigned int)plat->bank;
+ uc_priv->gpio_count = plat->gpio_ranges;
+#endif
snprintf(name, sizeof(name), "GPIO%d_", priv->bank);
str = strdup(name);
if (!str)
@@ -246,16 +258,33 @@ static int mxs_gpio_probe(struct udevice *dev)
uc_priv->bank_name = str;
+ debug("%s: %s: %d pins base: 0x%x\n", __func__, uc_priv->bank_name,
+ uc_priv->gpio_count, priv->bank);
+
+ return 0;
+}
+
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int mxs_ofdata_to_platdata(struct udevice *dev)
+{
+ struct mxs_gpio_platdata *plat = dev->platdata;
+ struct fdtdec_phandle_args args;
+ int node = dev_of_offset(dev);
+ int ret;
+
+ plat->bank = devfdt_get_addr(dev);
+ if (plat->bank == FDT_ADDR_T_NONE) {
+ printf("%s: No 'reg' property defined!\n", __func__);
+ return -EINVAL;
+ }
+
ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
NULL, 3, 0, &args);
if (ret)
printf("%s: 'gpio-ranges' not defined - using default!\n",
__func__);
- uc_priv->gpio_count = ret == 0 ? args.args[2] : MXS_MAX_GPIO_PER_BANK;
-
- debug("%s: %s: %d pins\n", __func__, uc_priv->bank_name,
- uc_priv->gpio_count);
+ plat->gpio_ranges = ret == 0 ? args.args[2] : MXS_MAX_GPIO_PER_BANK;
return 0;
}
@@ -265,13 +294,22 @@ static const struct udevice_id mxs_gpio_ids[] = {
{ .compatible = "fsl,imx28-gpio" },
{ }
};
+#endif
U_BOOT_DRIVER(gpio_mxs) = {
- .name = "gpio_mxs",
+#ifdef CONFIG_MX28
+ .name = "fsl_imx28_gpio",
+#else /* CONFIG_MX23 */
+ .name = "fsl_imx23_gpio",
+#endif
.id = UCLASS_GPIO,
.ops = &gpio_mxs_ops,
.probe = mxs_gpio_probe,
.priv_auto_alloc_size = sizeof(struct mxs_gpio_priv),
+ .platdata_auto_alloc_size = sizeof(struct mxs_gpio_platdata),
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.of_match = mxs_gpio_ids,
+ .ofdata_to_platdata = mxs_ofdata_to_platdata,
+#endif
};
#endif /* CONFIG_DM_GPIO */
--
2.11.0
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