On Tue, Sep 24, 2019 at 2:08 PM Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> wrote: > > Hi Vignesh, > > On Tue, Sep 24, 2019 at 1:54 PM Vignesh Raghavendra <vigne...@ti.com> wrote: > > > > Simon, > > > > On 24-Sep-19 5:15 PM, Simon Goldschmidt wrote: > > > Hi Tudor, > > > > > > On Tue, Sep 24, 2019 at 1:36 PM <tudor.amba...@microchip.com> wrote: > > >> > > [...] > > > > >>>> > > >>>> Simon, > > >>>> Could you provide dump of SFDP tables and all the 6 bytes READ ID of > > >>>> the > > >>>> flash that you have? > > >>> > > >>> I have a n251256a with JEDEC ID 20, ba, 19, 10, 44, 00. > > >> > > >> Is this a n25q256a or a MT25QL256ABA? We want to check if there are > > >> n25q256a > > >> flashes that have the 6th bit of the Extended Device Id set to one or > > >> not. > > >> According to n25q256a datasheet the bit 6 is reserved (which probably > > >> translates > > >> to being zero), while on MT25QL256ABA is set to one. > > > > > > Right, this really is a MT25QL256ABA, I guess. I'm not quite familiar > > > with the > > > print on the housing, sorry. We had both and here, it's probably the MT, > > > not > > > the nq. > > > > > > > But, do you have access to n25q variants? And does that support 4 Byte > > addressing opcode? What does its JEDEC ID read? > > No, at the moment I don't. I'll see if I can get hold of one.
Ok, so I found a board with an n25q256a and tested that as well as the Altera/Intel EPCQ256N (on socfpga_socrateds) and both read the same ID and SFDP: JEDEC id bytes: 20, ba, 19, 10, 00, 00 bfpt.dwords[0] = fffb20e5 bfpt.dwords[1] = 0fffffff bfpt.dwords[2] = 6b27eb29 bfpt.dwords[3] = bb273b08 bfpt.dwords[4] = ffffffff bfpt.dwords[5] = bb27ffff bfpt.dwords[6] = eb29ffff bfpt.dwords[7] = d810200c bfpt.dwords[8] = 00000000 bfpt.dwords[9] = 00000000 bfpt.dwords[10] = 00000000 bfpt.dwords[11] = 00000000 bfpt.dwords[12] = 00000000 bfpt.dwords[13] = 00000000 bfpt.dwords[14] = 00000000 bfpt.dwords[15] = 00000000 SF: Detected n25q256a with page size 256 Bytes, erase size 64 KiB, total 32 MiB I don't know whether one of these supports 4 byte opcodes, but I guess it's safe to say the 5th byte 0x44 is an mt25 which supports 4 byte opcodes. Do you plan to port this series to Linux, too? Regards, Simon > > Regards, > Simon > > > > > > I also wasn't really aware of the differences between those two, sorry. > > > > > > Regards, > > > Simon > > > > > >> > > >> Cheers, > > >> ta > > >> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot