Hi Simon, On Wed, Sep 25, 2019 at 10:58 PM Simon Glass <s...@chromium.org> wrote: > > Most of the timer-calibration methods are not needed on recent Intel CPUs > and just increase code size. Add an option to use the known-good way to > get the clock frequency in TPL. Size reduction is about 700 bytes. > > Signed-off-by: Simon Glass <s...@chromium.org> > --- > > drivers/timer/Kconfig | 29 +++++++++++++++++++---------- > drivers/timer/tsc_timer.c | 7 +++++-- > 2 files changed, 24 insertions(+), 12 deletions(-) > > diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig > index 5f4bc6edb67..90bc8ec7c53 100644 > --- a/drivers/timer/Kconfig > +++ b/drivers/timer/Kconfig > @@ -117,16 +117,6 @@ config RENESAS_OSTM_TIMER > Enables support for the Renesas OSTM Timer driver. > This timer is present on Renesas RZ/A1 R7S72100 SoCs. > > -config X86_TSC_TIMER_EARLY_FREQ > - int "x86 TSC timer frequency in MHz when used as the early timer" > - depends on X86_TSC_TIMER > - default 1000 > - help > - Sets the estimated CPU frequency in MHz when TSC is used as the > - early timer and the frequency can neither be calibrated via some > - hardware ways, nor got from device tree at the time when device > - tree is not available yet. > - > config OMAP_TIMER > bool "Omap timer support" > depends on TIMER > @@ -174,6 +164,25 @@ config X86_TSC_TIMER > help > Select this to enable Time-Stamp Counter (TSC) timer for x86. > > +config X86_TSC_TIMER_EARLY_FREQ > + int "x86 TSC timer frequency in MHz when used as the early timer" > + depends on X86_TSC_TIMER > + default 1000 > + help > + Sets the estimated CPU frequency in MHz when TSC is used as the > + early timer and the frequency can neither be calibrated via some > + hardware ways, nor got from device tree at the time when device > + tree is not available yet. > + > +config TPL_X86_TSC_TIMER_NATIVE > + bool "x86 TSC timer uses native calibration" > + depends on TPL && X86_TSC_TIMER > + help > + Selects native timer calibration for TPL and don't include the other > + methods in the code. This helps to reduce code size in TPL and works > + on fairly modern Intel chips. Code-size reductions is about 700 > + bytes. > + > config MTK_TIMER > bool "MediaTek timer support" > depends on TIMER > diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c > index 919caba8a14..9630036bc7f 100644 > --- a/drivers/timer/tsc_timer.c > +++ b/drivers/timer/tsc_timer.c > @@ -49,8 +49,7 @@ static unsigned long native_calibrate_tsc(void) > return 0; > > crystal_freq = tsc_info.ecx / 1000; > - > - if (!crystal_freq) { > + if (!CONFIG_IS_ENABLED(X86_TSC_TIMER_NATIVE) && !crystal_freq) { > switch (gd->arch.x86_model) { > case INTEL_FAM6_SKYLAKE_MOBILE: > case INTEL_FAM6_SKYLAKE_DESKTOP: > @@ -405,6 +404,10 @@ static void tsc_timer_ensure_setup(bool early) > if (fast_calibrate) > goto done; > > + /* Reduce code size by dropping other methods */ > + if (CONFIG_IS_ENABLED(X86_TSC_TIMER_NATIVE)) > + panic("no timer"); > +
I don't get it. How could this reduce the code size? I don't see any #ifdefs around the other methods we want to drop? > fast_calibrate = cpu_mhz_from_cpuid(); > if (fast_calibrate) > goto done; > -- Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot