On Sun, 2019-10-06 at 15:44 +0200, Marek Vasut wrote:
> On 10/6/19 1:19 AM, Dalon L Westergreen wrote:
> > On Sat, 2019-10-05 at 01:51 +0200, Marek Vasut wrote:
> > > On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> > > > From: Dalon Westergreen <dalon.westergr...@intel.com>Generic handoff
> > > > devicetree include uses a header generated bythe qts-filter-a10.sh
> > > > script in mach-socfpga. The scriptcreates the header based on
> > > > designspecific implementationsfor clock and pinmux configurations.
> > >
> > > [...]
> > > > diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-
> > > > boot.dtsib/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
> > >
> > > [...]
> > > > - clock_manager@0xffd04000 {+ clkmgr@0xffd04000 {+
> > > > compatible ="altr,socfpga-a10-clk-init";+ reg =
> > > > <0xffd04000 0x00000200>;+ reg-names =
> > > > "soc_clock_manager_OCP_SLV"; u-boot,dm-pre-reloc;
> > > > mainpll {+ vco0-psrc =<MAINPLLGRP_VCO0_PSRC>;+
> > > >
> > > > vco1-denom =<MAINPLLGRP_VCO1_DENOM>;+ vco1-
> > > > numer =<MAINPLLGRP_VCO1_NUMER>;
> > >
> > > But these bits are board-specific , they shouldn't be in common DT.
> >
> > This common dtsi requires that the top level u-boot.dtsi include the
> > boardspecific header. The formatand #define names are in fact common.
>
> OK, I now see what you're doing here. Can you explain that in a bit moredetail
> in the commit message ?
> Basically socfpga_board.h is included socfpga_board.dts , and then
> thepreprocessor correctly expands the values from socfpga_board.h in
> thesocfpga_board.dts , so this works for multiple boards too ?
oh, and yes, it does work for multiple boards, i have already tested this.
--dalon
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