>-----Original Message----- >From: Yinbo Zhu <[email protected]> >Sent: Tuesday, October 15, 2019 2:51 PM >To: Wolfgang Denk <[email protected]>; Priyanka Jain <[email protected]>; >Shengzhou Liu <[email protected]>; [email protected] >Cc: Yinbo Zhu <[email protected]>; Xiaobo Xie <[email protected]>; >Jiafei Pan <[email protected]>; Prabhakar X ><[email protected]>; Bin Meng <[email protected]>; Simon >Goldschmidt <[email protected]>; Adam Ford ><[email protected]>; Patrick Delaunay <[email protected]>; Jeremy >Gebben <[email protected]>; Joe Hershberger ><[email protected]>; Y.b. Lu <[email protected]> >Subject: [PATCH v3 01/20] arch: powerpc: add eSDHC node to p1020 dts > >Add eSDHC node to p1020 dts > >Signed-off-by: Yinbo Zhu <[email protected]> >--- > arch/powerpc/dts/p1020-post.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > >diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020- >post.dtsi >index 1e5e678..fb3b203 100644 >--- a/arch/powerpc/dts/p1020-post.dtsi >+++ b/arch/powerpc/dts/p1020-post.dtsi >@@ -24,6 +24,13 @@ > single-cpu-affinity; > last-interrupt-source = <255>; > }; >+ >+ esdhc: esdhc@2e000 { >+ compatible = "fsl,esdhc"; >+ reg = <0x2e000 0x1000>; >+ /* Filled in by U-Boot */ >+ clock-frequency = <0>; >+ }; > }; > > /* PCIe controller base address 0x9000 */ >-- >2.9.5 Travis reports error with this series: https://travis-ci.org/p-priyanka-jain/u-boot-fsl-qoriq/builds/601133375 Kindly fix. Putting the series for merge on-hold till then
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