Set chosen stdout-path in DT
Add uart3 and associated pinctrl definitions in DT
Remove legacy uart pad and iomux code
Enable DM serial and mxc uart

Signed-off-by: Robert Beckett <bob.beck...@collabora.com>
---
 arch/arm/dts/imx6q-bx50v3.dts | 20 ++++++++++++++++++++
 board/ge/bx50v3/bx50v3.c      | 24 ------------------------
 configs/ge_bx50v3_defconfig   |  3 +++
 include/configs/ge_bx50v3.h   | 10 ++--------
 4 files changed, 25 insertions(+), 32 deletions(-)

diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index e9aaca4a78..7b5fe3b5de 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -14,6 +14,10 @@
        model = "General Electric Bx50v3";
        compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
 
+       chosen {
+               stdout-path = &uart3;
+       };
+
        aliases {
                ethernet0 = &fec;
        };
@@ -236,6 +240,15 @@
                        MX6QDL_PAD_SD1_DAT3__PWM1_OUT   0x1b0b1
                >;
        };
+
+       pinctrl_uart3: uart3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+                       MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+                       MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
+                       MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
+               >;
+       };
 };
 
 &usdhc1 {
@@ -596,3 +609,10 @@
                interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
        };
 };
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       uart-has-rtscts;
+       status = "okay";
+};
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 2e11697af0..aa4a3598c6 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -46,10 +46,6 @@ static struct vpd_cache vpd;
        PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
        PAD_CTL_HYS)
 
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
-       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |                 \
-       PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |    \
        PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
 
@@ -72,24 +68,6 @@ int dram_init(void)
        return 0;
 }
 
-static iomux_v3_cfg_t const uart3_pads[] = {
-       MX6_PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const uart4_pads[] = {
-       MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
-       imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
-       imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
-}
-
 static int mx6_rgmii_rework(struct phy_device *phydev)
 {
        /* Configure AR8033 to ouput a 125MHz clk from CLK_25M */
@@ -423,8 +401,6 @@ int board_early_init_f(void)
        imx_iomux_v3_setup_multiple_pads(misc_pads,
                                         ARRAY_SIZE(misc_pads));
 
-       setup_iomux_uart();
-
 #if defined(CONFIG_VIDEO_IPUV3)
        /* Set LDB clock to Video PLL */
        select_ldb_di_clock_source(MXC_PLL5_CLK);
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 977aac41f6..8acb41c046 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -65,6 +65,9 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RX8010SJ=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 6ca43c3cf7..d59a965792 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -16,9 +16,6 @@
 
 #define CONFIG_BOARD_NAME      "General Electric Bx50v3"
 
-#define CONFIG_MXC_UART_BASE   UART3_BASE
-#define CONSOLE_DEV    "ttymxc2"
-
 #include "mx6_common.h"
 #include <linux/sizes.h>
 
@@ -28,8 +25,6 @@
 #define CONFIG_REVISION_TAG
 #define CONFIG_SYS_MALLOC_LEN          (10 * SZ_1M)
 
-#define CONFIG_MXC_UART
-
 /* SATA Configs */
 #ifdef CONFIG_CMD_SATA
 #define CONFIG_SYS_SATA_MAX_DEVICE     1
@@ -64,7 +59,7 @@
                 "setenv netmask 255.255.255.0; setenv ethaddr 
ca:fe:de:ca:f0:11; " \
                 "setenv bootargs root=/dev/nfs 
nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \
                 "setenv bootargs $bootargs 
ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \
-                "setenv bootargs $bootargs cma=128M bootcause=POR 
console=${console} ${videoargs} " \
+                "setenv bootargs $bootargs cma=128M bootcause=POR ${videoargs} 
" \
                 "setenv bootargs $bootargs 
systemd.mask=helix-network-defaults.service " \
                 "setenv bootargs $bootargs watchdog.handle_boot_enabled=1\0" \
         "networkboot=" \
@@ -89,11 +84,10 @@
        "devnum=2\0" \
        "rootdev=mmcblk0p\0" \
        "quiet=quiet loglevel=0\0" \
-       "console=" CONSOLE_DEV "\0" \
        "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \
                "ro rootwait cma=128M " \
                "bootcause=${bootcause} " \
-               "${quiet} console=${console} " \
+               "${quiet} " \
                "${videoargs}" "\0" \
        "doquiet=" \
                "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
-- 
2.20.1

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to