Signed-off-by: Albert Aribaud <albert.arib...@free.fr>
---
drivers/net/mv_egiga.c | 2 +-
drivers/net/mv_egiga.h | 206 ++++++++++++++++++++++++------------------------
2 files changed, 104 insertions(+), 104 deletions(-)
diff --git a/drivers/net/mv_egiga.c b/drivers/net/mv_egiga.c
index 0da4c4b..96e6a5a 100644
--- a/drivers/net/mv_egiga.c
+++ b/drivers/net/mv_egiga.c
@@ -177,7 +177,7 @@ static int smi_reg_write(char *devname, u8 phy_adr, u8
reg_ofs, u16 data)
}
/* Stop and checks all queues */
-static void stop_queue(u32 * qreg)
+static void stop_queue(volatile u32 * qreg)
{
u32 reg_data;
diff --git a/drivers/net/mv_egiga.h b/drivers/net/mv_egiga.h
index 61c3157..c49bf40 100644
--- a/drivers/net/mv_egiga.h
+++ b/drivers/net/mv_egiga.h
@@ -342,108 +342,108 @@
/* structures represents Controller registers */
struct mv_egiga_barsz {
- u32 bar;
- u32 size;
+ volatile u32 bar;
+ volatile u32 size;
};
struct mv_egiga_rxcdp {
- struct mv_egiga_rxdesc *rxcdp;
- u32 rxcdp_pad[3];
+ volatile struct mv_egiga_rxdesc *rxcdp;
+ volatile u32 rxcdp_pad[3];
};
struct mv_egiga_tqx {
- u32 qxttbc;
- u32 tqxtbc;
- u32 tqxac;
- u32 tqxpad;
+ volatile u32 qxttbc;
+ volatile u32 tqxtbc;
+ volatile u32 tqxac;
+ volatile u32 tqxpad;
};
struct mv_egiga_registers {
- u32 phyadr;
- u32 smi;
- u32 euda;
- u32 eudid;
- u8 pad1[0x080 - 0x00c - 4];
- u32 euic;
- u32 euim;
- u8 pad2[0x094 - 0x084 - 4];
- u32 euea;
- u32 euiae;
- u8 pad3[0x0b0 - 0x098 - 4];
- u32 euc;
- u8 pad3a[0x200 - 0x0b0 - 4];
- struct mv_egiga_barsz barsz[6];
- u8 pad4[0x280 - 0x22c - 4];
- u32 ha_remap[4];
- u32 bare;
- u32 epap;
- u8 pad5[0x400 - 0x294 - 4];
- u32 pxc;
- u32 pxcx;
- u32 mii_ser_params;
- u8 pad6[0x410 - 0x408 - 4];
- u32 evlane;
- u32 macal;
- u32 macah;
- u32 sdc;
- u32 dscp[7];
- u32 psc0;
- u32 vpt2p;
- u32 ps0;
- u32 tqc;
- u32 psc1;
- u32 ps1;
- u32 mrvl_header;
- u8 pad7[0x460 - 0x454 - 4];
- u32 ic;
- u32 ice;
- u32 pim;
- u32 peim;
- u8 pad8[0x474 - 0x46c - 4];
- u32 pxtfut;
- u32 pad9;
- u32 pxmfs;
- u32 pad10;
- u32 pxdfc;
- u32 pxofc;
- u8 pad11[0x494 - 0x488 - 4];
- u32 peuiae;
- u8 pad12[0x4bc - 0x494 - 4];
- u32 eth_type_prio;
- u8 pad13[0x4dc - 0x4bc - 4];
- u32 tqfpc;
- u32 pttbrc;
- u32 tqc1;
- u32 pmtu;
- u32 pmtbs;
- u8 pad14[0x60c - 0x4ec - 4];
- struct mv_egiga_rxcdp rxcdp[7];
- struct mv_egiga_rxdesc *rxcdp7;
- u32 rqc;
- struct mv_egiga_txdesc *tcsdp;
- u8 pad15[0x6c0 - 0x684 - 4];
- struct mv_egiga_txdesc *tcqdp[8];
- u8 pad16[0x700 - 0x6dc - 4];
- struct mv_egiga_tqx tqx[8];
- u32 pttbc;
- u8 pad17[0x7a8 - 0x780 - 4];
- u32 tqxipg0;
- u32 pad18[3];
- u32 tqxipg1;
- u8 pad19[0x7c0 - 0x7b8 - 4];
- u32 hitkninlopkt;
- u32 hitkninasyncpkt;
- u32 lotkninasyncpkt;
- u32 pad20;
- u32 ts;
- u8 pad21[0x3000 - 0x27d0 - 4];
- u32 pad20_1[32]; /* mib counter registes */
- u8 pad22[0x3400 - 0x3000 - sizeof(u32) * 32];
- u32 dfsmt[64];
- u32 dfomt[64];
- u32 dfut[4];
- u8 pad23[0xe20c0 - 0x7360c - 4];
- u32 pmbus_top_arbiter;
+ volatile u32 phyadr;
+ volatile u32 smi;
+ volatile u32 euda;
+ volatile u32 eudid;
+ volatile u8 pad1[0x080 - 0x00c - 4];
+ volatile u32 euic;
+ volatile u32 euim;
+ volatile u8 pad2[0x094 - 0x084 - 4];
+ volatile u32 euea;
+ volatile u32 euiae;
+ volatile u8 pad3[0x0b0 - 0x098 - 4];
+ volatile u32 euc;
+ volatile u8 pad3a[0x200 - 0x0b0 - 4];
+ volatile struct mv_egiga_barsz barsz[6];
+ volatile u8 pad4[0x280 - 0x22c - 4];
+ volatile u32 ha_remap[4];
+ volatile u32 bare;
+ volatile u32 epap;
+ volatile u8 pad5[0x400 - 0x294 - 4];
+ volatile u32 pxc;
+ volatile u32 pxcx;
+ volatile u32 mii_ser_params;
+ volatile u8 pad6[0x410 - 0x408 - 4];
+ volatile u32 evlane;
+ volatile u32 macal;
+ volatile u32 macah;
+ volatile u32 sdc;
+ volatile u32 dscp[7];
+ volatile u32 psc0;
+ volatile u32 vpt2p;
+ volatile u32 ps0;
+ volatile u32 tqc;
+ volatile u32 psc1;
+ volatile u32 ps1;
+ volatile u32 mrvl_header;
+ volatile u8 pad7[0x460 - 0x454 - 4];
+ volatile u32 ic;
+ volatile u32 ice;
+ volatile u32 pim;
+ volatile u32 peim;
+ volatile u8 pad8[0x474 - 0x46c - 4];
+ volatile u32 pxtfut;
+ volatile u32 pad9;
+ volatile u32 pxmfs;
+ volatile u32 pad10;
+ volatile u32 pxdfc;
+ volatile u32 pxofc;
+ volatile u8 pad11[0x494 - 0x488 - 4];
+ volatile u32 peuiae;
+ volatile u8 pad12[0x4bc - 0x494 - 4];
+ volatile u32 eth_type_prio;
+ volatile u8 pad13[0x4dc - 0x4bc - 4];
+ volatile u32 tqfpc;
+ volatile u32 pttbrc;
+ volatile u32 tqc1;
+ volatile u32 pmtu;
+ volatile u32 pmtbs;
+ volatile u8 pad14[0x60c - 0x4ec - 4];
+ volatile struct mv_egiga_rxcdp rxcdp[7];
+ volatile struct mv_egiga_rxdesc *rxcdp7;
+ volatile u32 rqc;
+ volatile struct mv_egiga_txdesc *tcsdp;
+ volatile u8 pad15[0x6c0 - 0x684 - 4];
+ volatile struct mv_egiga_txdesc *tcqdp[8];
+ volatile u8 pad16[0x700 - 0x6dc - 4];
+ volatile struct mv_egiga_tqx tqx[8];
+ volatile u32 pttbc;
+ volatile u8 pad17[0x7a8 - 0x780 - 4];
+ volatile u32 tqxipg0;
+ volatile u32 pad18[3];
+ volatile u32 tqxipg1;
+ volatile u8 pad19[0x7c0 - 0x7b8 - 4];
+ volatile u32 hitkninlopkt;
+ volatile u32 hitkninasyncpkt;
+ volatile u32 lotkninasyncpkt;
+ volatile u32 pad20;
+ volatile u32 ts;
+ volatile u8 pad21[0x3000 - 0x27d0 - 4];
+ volatile u32 pad20_1[32]; /* mib counter registes */
+ volatile u8 pad22[0x3400 - 0x3000 - sizeof(u32) * 32];
+ volatile u32 dfsmt[64];
+ volatile u32 dfomt[64];
+ volatile u32 dfut[4];
+ volatile u8 pad23[0xe20c0 - 0x7360c - 4];
+ volatile u32 pmbus_top_arbiter;
};
/* structures/enums needed by driver */
@@ -476,19 +476,19 @@ struct mv_egiga_winparam {
};
struct mv_egiga_rxdesc {
- u32 cmd_sts; /* Descriptor command status */
- u16 buf_size; /* Buffer size */
- u16 byte_cnt; /* Descriptor buffer byte count */
- u8 *buf_ptr; /* Descriptor buffer pointer */
- struct mv_egiga_rxdesc *nxtdesc_p; /* Next descriptor pointer */
+ volatile u32 cmd_sts; /* Descriptor command status */
+ volatile u16 buf_size; /* Buffer size */
+ volatile u16 byte_cnt; /* Descriptor buffer byte count */
+ volatile u8 *buf_ptr; /* Descriptor buffer pointer */
+ volatile struct mv_egiga_rxdesc *nxtdesc_p; /* Next descriptor
pointer */
};
struct mv_egiga_txdesc {
- u32 cmd_sts; /* Descriptor command status */
- u16 l4i_chk; /* CPU provided TCP Checksum */
- u16 byte_cnt; /* Descriptor buffer byte count */
- u8 *buf_ptr; /* Descriptor buffer ptr */
- struct mv_egiga_txdesc *nxtdesc_p; /* Next descriptor ptr */
+ volatile u32 cmd_sts; /* Descriptor command status */
+ volatile u16 l4i_chk; /* CPU provided TCP Checksum */
+ volatile u16 byte_cnt; /* Descriptor buffer byte count */
+ volatile u8 *buf_ptr; /* Descriptor buffer ptr */
+ volatile struct mv_egiga_txdesc *nxtdesc_p; /* Next descriptor ptr
*/
};
/* port device data struct */
--
1.6.4.4
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