From: Suneel Garapati <sgarap...@marvell.com>
Enable PCI memory regions to be of multiple entry. This helps to
add support for SoC's like OcteonTX/TX2 where every peripheral is
on PCI bus.
Signed-off-by: Suneel Garapati <sgarap...@marvell.com>
---
drivers/pci/Kconfig | 9 +++++++++
drivers/pci/pci-uclass.c | 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 19e7b50046..752439afcf 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -43,6 +43,15 @@ config PCI_PNP
help
Enable PCI memory and I/O space resource allocation and assignment.
+config PCI_REGION_MULTI_ENTRY
+ bool "Enable Multiple entries of MEMORY region for PCI"
+ depends on PCI || DM_PCI
+ default n
+ help
+ Enable PCI memory regions to be of multiple entry. This helps to
+ add support for SoC's like OcteonTX/TX2 where every peripheral is
+ on PCI bus.
+
config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support"
default n
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 007b7472c6..f17e83565c 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -902,10 +902,12 @@ static void decode_regions(struct pci_controller *hose,
ofnode parent_node,
}
pos = -1;
+#if !CONFIG_IS_ENABLED(PCI_REGION_MULTI_ENTRY)
for (i = 0; i < hose->region_count; i++) {
if (hose->regions[i].flags == type)
pos = i;
}
+#endif
if (pos == -1)
pos = hose->region_count++;
debug(" - type=%d, pos=%d\n", type, pos);
--
2.23.0
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