From: Tom Warren <twar...@nvidia.com> These fixes originated on our downstream L4T U-Boot, and include fdt, pinmux, pll and code relocation changes.
JC Kuo (1): t210: do not enable PLLE and UPHY PLL HW PWRSEQ Stephen Warren (1): ARM: tegra: rework fdt_serial_tag_setup_one Tom Warren (2): fdt: Fix 'system' command ARM: Tegra: Use calculated env var feature on all T186/T210 boards Vishruth (1): ARM: tegra: p2771-0000: enable PIE relocation arch/arm/cpu/armv8/cpu.c | 5 ++ arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + arch/arm/mach-tegra/board2.c | 6 +++ arch/arm/mach-tegra/ft_board_info.c | 77 +++++++++++++++++++++++++++ arch/arm/mach-tegra/ft_board_info.h | 23 ++++++++ arch/arm/mach-tegra/tegra210/clock.c | 19 ------- arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 ++++++++++++++--------- arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ cmd/fdt.c | 2 +- configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + include/configs/p2771-0000.h | 23 +------- include/configs/tegra186-common.h | 22 +++++++- include/configs/tegra210-common.h | 23 ++++++-- 14 files changed, 204 insertions(+), 71 deletions(-) create mode 100644 arch/arm/mach-tegra/ft_board_info.c create mode 100644 arch/arm/mach-tegra/ft_board_info.h -- 1.8.2.1.610.g562af5b ----------------------------------------------------------------------------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. -----------------------------------------------------------------------------------
