The eMMC uses different pinmux for the top four data lines, use such
a pinmux, otherwise it takes a very long time until the test for 8bit
operation times out. And this is the correct pinmux per schematic too.

Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Patrick Delaunay <patrick.delau...@st.com>
Cc: Patrice Chotard <patrice.chot...@st.com>
---
V2: Update also the -u-boot.dtsi to match this change
---
 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 2 +-
 arch/arm/dts/stm32mp157a-avenger96.dts         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi 
b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
index 47bfbb8d77..2c7dc509a3 100644
--- a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -174,7 +174,7 @@
        };
 };
 
-&sdmmc2_d47_pins_a {
+&sdmmc2_d47_pins_b {
        u-boot,dm-spl;
        pins {
                u-boot,dm-spl;
diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts 
b/arch/arm/dts/stm32mp157a-avenger96.dts
index 1e9b45b69d..3fca1ed56d 100644
--- a/arch/arm/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/dts/stm32mp157a-avenger96.dts
@@ -327,7 +327,7 @@
 
 &sdmmc2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
+       pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
        non-removable;
        no-sd;
        no-sdio;
-- 
2.25.1

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