-----Original Message-----
From: Thierry Reding <tred...@nvidia.com>
Sent: Wednesday, April 1, 2020 8:20 AM
To: Tom Warren <twar...@nvidia.com>
Cc: Peter Robinson <pbrobin...@gmail.com>; tomcwarren3...@gmail.com;
u-boot@lists.denx.de; Stephen Warren <swar...@nvidia.com>; Jonathan Hunter
<jonath...@nvidia.com>; Vishruth Jain <vishru...@nvidia.com>
Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
> -----Original Message-----
> From: Peter Robinson <pbrobin...@gmail.com>
> Sent: Tuesday, March 31, 2020 3:54 AM
> To: tomcwarren3...@gmail.com
> Cc: u-boot@lists.denx.de; Stephen Warren <swar...@nvidia.com>; Thierry
> Reding <tred...@nvidia.com>; Jonathan Hunter <jonath...@nvidia.com>;
> Tom Warren <twar...@nvidia.com>; Vishruth Jain <vishru...@nvidia.com>
> Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
>
> External email: Use caution opening links or attachments
>
>
> > From: Stephen Warren <swar...@nvidia.com>
> >
> > This adds to the DT the I2C controllers that connect to the board ID
> > EEPROM, camera board EEPROM, etc. With this change, you can now
> > probe all I2C devices on a TX1 board.
> >
> > Signed-off-by: Tom Warren <twar...@nvidia.com>
> > ---
> > arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm/dts/tegra210-p2371-2180.dts
> > b/arch/arm/dts/tegra210-p2371-2180.dts
> > index c2f497c..d982b5f 100644
> > --- a/arch/arm/dts/tegra210-p2371-2180.dts
> > +++ b/arch/arm/dts/tegra210-p2371-2180.dts
> > @@ -12,6 +12,9 @@
> >
> > aliases {
> > i2c0 = "/i2c@7000d000";
> > + i2c2 = "/i2c@7000c400";
> > + i2c3 = "/i2c@7000c500";
> > + i2c5 = "/i2c@546c0c00";
>
> I don't think this is correct, it doesn't show up in U-Boot with the
> "i2c bus" command where the others do, looking in the tegra210.dtsi it
> looks like it should be i2c@546c0000?
> [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The
> VI_I2C controller is a little weird, it's normal I2C registers are
> offset from base by 0xC00. A different driver is needed, but I
> haven't posted it yet upstream. I should probably drop if from the
> DTS for now until I post the VI_I2C driver.
I think the problem here is that the upstream U-Boot device tree doesn't
contain an i2c@546c0c00 node. Instead it has i2c@546c0000, which we also have
in the upstream kernel. My recollection is that that's also the address listed
in the Tegra210 system address map of the TRM and there are some registers
before the regular I2C interface at offset 0xc00.
I've been carrying a patch against the upstream Linux I2C controller driver to
special-case the VI/I2C to always add that 0xc00 offset when accessing
registers, which allows us to reuse the existing driver and at the same time
keeps all registers mapped so we can also access the VI/I2C specific registers.
My recollection is that the U-Boot driver is fairly similar to the Linux
driver, so I suspect something similar could be done.
Thierry
[Tom] Thanks, Thierry. That's my recollection, too, about the VI_I2C 0xC00
offset. I'll take a look at what we have in L4T U-Boot for T210 and address it
in a set of patches for upstream soon. That I2C controller isn't used for
anything on any Jetson board except on TX1, I believe, where it allows U-Boot
to talk to the camera add-in board to read the board ID. But we've moved all
that out to CBoot (board ID EEPROM reading), so there isn't a pressing need for
it in U-Boot anymore, IIRC.
--nvpublic
