and because some platforms need to load QE firmware from NAND flash(no NOR
flash), it makes qe_init to be called after nand_init.

Signed-off-by: Haiying Wang <haiying.w...@freescale.com>
---
 arch/powerpc/cpu/mpc83xx/cpu_init.c |    8 --------
 arch/powerpc/cpu/mpc85xx/cpu_init.c |    8 --------
 arch/powerpc/lib/board.c            |   31 +++++++++++++++++++++++++++++++
 3 files changed, 31 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 83cba93..6d40037 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -34,8 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
                         int open_drain, int assign);
-extern void qe_init(uint qe_base);
-extern void qe_reset(void);
 
 static void config_qe_ioports(void)
 {
@@ -333,12 +331,6 @@ void cpu_init_f (volatile immap_t * im)
 
 int cpu_init_r (void)
 {
-#ifdef CONFIG_QE
-       uint qe_base = CONFIG_SYS_IMMR + 0x00100000; /* QE immr base */
-
-       qe_init(qe_base);
-       qe_reset();
-#endif
        return 0;
 }
 
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 1fbc0cc..f799773 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -44,8 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
                                int open_drain, int assign);
-extern void qe_init(uint qe_base);
-extern void qe_reset(void);
 
 static void config_qe_ioports(void)
 {
@@ -369,12 +367,6 @@ int cpu_init_r(void)
 
        enable_cpc();
 
-#ifdef CONFIG_QE
-       uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
-       qe_init(qe_base);
-       qe_reset();
-#endif
-
 #if defined(CONFIG_SYS_HAS_SERDES)
        /* needs to be in ram since code uses global static vars */
        fsl_serdes_init();
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 0e00d86..3fa865d 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -87,6 +87,15 @@
 #include <miiphy.h>
 #endif
 
+#ifdef CONFIG_QE
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#include <nand.h>
+#include <asm/errno.h>
+#endif
+extern void qe_init(uint qe_base);
+extern void qe_reset(void);
+#endif
+
 #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
 extern int update_flash_size (int flash_size);
 #endif
@@ -631,6 +640,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
        char *s;
        bd_t *bd;
        ulong malloc_start;
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+       int ret;
+       size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+#endif
 
 #ifndef CONFIG_SYS_NO_FLASH
        ulong flash_size;
@@ -783,6 +796,24 @@ void board_init_r (gd_t *id, ulong dest_addr)
        nand_init();            /* go init the NAND */
 #endif
 
+       /* QE needs to be initialized after nand_init because some boards have
+        * to save QE firmware in NAND flash.
+        */
+#ifdef CONFIG_QE
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+       /* load QE firmware from NAND flash to DDR first */
+       ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+               &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+
+       if (ret && ret == -EUCLEAN) {
+               printf ("NAND read for QE firmware at offset %x failed %d\n",
+               (loff_t)CONFIG_SYS_QE_FW_IN_NAND, ret);
+       }
+#endif /* CONFIG_SYS_QE_FW_IN_NAND */
+       qe_init(CONFIG_SYS_IMMR + 0x00080000);
+       qe_reset();
+#endif /* CONFIG_QE */
+
        /* relocate environment function pointers etc. */
        env_relocate ();
 
-- 
1.7.0




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