Enable QE bit for ISSI flash chips.
QE enablement logic is similar to what Micromax
has, so reuse the existing code itself.
Cc: Sagar Shrikant Kadam <sagar.ka...@sifive.com>
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
drivers/mtd/spi/spi-nor-core.c | 1 +
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 7b6ad495ac..e0f6e4d6c3 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -325,6 +325,7 @@ static int set_4byte(struct spi_nor *nor, const struct
flash_info *info,
case SNOR_MFR_MICRON:
/* Some Micron need WREN command; all will accept it */
need_wren = true;
+ case SNOR_MFR_ISSI:
case SNOR_MFR_MACRONIX:
case SNOR_MFR_WINBOND:
if (need_wren)
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index ec144a08d8..233fdc341a 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -22,6 +22,7 @@
#define SNOR_MFR_INTEL CFI_MFR_INTEL
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron
*/
+#define SNOR_MFR_ISSI CFI_MFR_PMC
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
#define SNOR_MFR_SPANSION CFI_MFR_AMD
#define SNOR_MFR_SST CFI_MFR_SST
--
2.17.1
