On Fri, May 1, 2020 at 6:25 PM Bin Meng <bmeng...@gmail.com> wrote: > > On Fri, May 1, 2020 at 11:22 AM Simon Glass <s...@chromium.org> wrote: > > > > Make a few adjustments to allow us to build an SPL image for coreboot. > > > > Signed-off-by: Simon Glass <s...@chromium.org> > > --- > > > > Changes in v3: None > > Changes in v2: None > > > > arch/x86/cpu/Makefile | 4 +++- > > arch/x86/cpu/coreboot/Makefile | 8 +++++++- > > arch/x86/cpu/coreboot/coreboot.c | 3 ++- > > arch/x86/cpu/coreboot/coreboot_spl.c | 12 ++++++++++++ > > arch/x86/cpu/intel_common/Makefile | 2 ++ > > arch/x86/cpu/x86_64/cpu.c | 2 ++ > > 6 files changed, 28 insertions(+), 3 deletions(-) > > create mode 100644 arch/x86/cpu/coreboot/coreboot_spl.c > > > > Reviewed-by: Bin Meng <bmeng...@gmail.com> > Tested-by: Bin Meng <bmeng...@gmail.com>
applied to u-boot-x86, thanks!