Am 02.05.20 um 10:59 schrieb Stefan Roese:
> WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
> the exception base register.
>
> Signed-off-by: Stefan Roese <s...@denx.de>
> ---
>
> arch/mips/lib/traps.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
> index 8fff7541e3..ccbce97161 100644
> --- a/arch/mips/lib/traps.c
> +++ b/arch/mips/lib/traps.c
> @@ -106,6 +106,10 @@ void trap_init(ulong reloc_addr)
>
> saved_ebase = read_c0_ebase() & 0xfffff000;
>
> + /* Set WG bit on Octeon to enable writing to bits 63:30 */
> + if (IS_ENABLED(CONFIG_ARCH_OCTEON))
> + ebase |= BIT(11);
you should add something like this to mipsregs.h
#define EBASE_WG (_ULCAST_(1) << 11)
we already have EBASE_CPUNUM.
> +
> write_c0_ebase(ebase);
> clear_c0_status(ST0_BEV);
> execution_hazard_barrier();
>
--
- Daniel
