Hi, > From: Marek Vasut <ma...@denx.de> > Sent: mercredi 22 avril 2020 13:18 > > The DHCOR board does exist in multiple variants with different DDR3 DRAM > sizes. > To cater for all of them, implement DDR3 code handling. > There are two GPIOs which code the DRAM size populated on the SoM, read them > out and use the value to pick the correct DDR3 config. > > Reviewed-by: Patrick Delaunay <patrick.delau...@st.com> > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org> > Cc: Patrick Delaunay <patrick.delau...@st.com> > Cc: Patrice Chotard <patrice.chot...@st.com> > --- > V2: Match on compatible string > V3: Add RB from Patrick > --- > arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 2 ++ > arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 2 ++ > board/dhelectronics/dh_stm32mp1/board.c | 26 +++++++++++++++++++++- > configs/stm32mp15_dhcom_basic_defconfig | 1 + > configs/stm32mp15_dhcor_basic_defconfig | 1 + > 5 files changed, 31 insertions(+), 1 deletion(-) >
Applied to u-boot-stm/master, thanks! Regards Patrick